Arnd Bergmann 95ab7b209b RISC-V Devicetrees for v6.11 ... Sopgho: Add clock support for SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEdoBX2jyDC9ZCTwZjDCzASqG0i0IFAmaMg3wACgkQDCzASqG0 i0Jh1wv/SVACZmbHdQ0ldCrjdPeSDQ5cN+TP2NHihFfE8+H7rzP/baHv9EnezGVQ Jcjw4Qj8uYqggN0wpWbWvuHC8tNPSrYIoQgbtnjyLBEjtwFINSOx7vwvldBszN1g ZXQuAf5KRyuBAcqUTVUBqX9bsZ9BvNvrV3xcLL9PZzH05tQiQG4J5ix9DF6wfkNW 7O0Ibz88EnTAUOhqLWiR+tOB6Us/fN2lZPgyVHjqy3L3OqwsDOtGjMlfDuCW2SJk Yw9Yi1tjSCr3Vipvz5RgJfuCElgOTgJCcyW6EkR9aBmVflpBQpFFYsw88EFA7qeO sKWKdln2+DuX9xqneDmpVLr7uEBP3QDdI+lr+gjC07k3lVO778meOqYa+NHIFhRL zT+VZ9NPD311/mNXt67yUoBntA7SgeaE6hPpcYeXEpl05T4nN9rdyFFNWm/IF3qH 7gd07Z78e8Cl02fz4V2rMdK61+2vfDbCITrCmbCChaWAdiPgI2Glo6ejGns+xzcw dPzLpga/ =NA9d -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaM+eMACgkQYKtH/8kJ UicYiw//ZH53sAC+TS2NiaW6GeqcXf5FOyt5uJpjG/Sga+OJvWqlL4rd9068aTGv Jvx0ZbFm0pml3OaVH7k23xyyGQN74v12Wnj9mZvKaTXTv2MKJfUMN+v3HkbUcju8 OBGrQcYdxWCg7ZYSDVYdm+ni6HwxiEripjRaVLbBIiAog+HkDtFs0ynpMLDv38MN 0rdFT5v7Zmfcz226De4zmhA2HK/1eP+vhsl3A/BqozUOk4z6J2eJQ8dUIwri8Cn3 YAttT0DPasdi3C8DBW0YZpwRIPYcpmPpjgtUyuc6LnqwWnsw+2HPCZsvpT0P336F 67ZHjYcKPQSPwqCicIgY94s2oqCWuDftD5kUfiQR7y6qfmQB/g0G3PCStH+DHBCC SXWOlRjIiACCycMVa1b7CKxCbo524/TjKd6Buf9RpxxrYV6IFaCMx6KH+rQMMa+f UV8yXJ7bP0OttvX4jpMelZpdH52Zk6SciJ2MHI7Ca2PHWBKeIPsWmMQeMqEHJ4hi ecEZIHMJ3iuhZ1aCv11LMtvFIDUVRyzgPybp241MXiCeSE0pg8QfiQazfnqidwsw a7hYb7ic+sCRhNx0QoFnGWQf4Y8PCf/8/oVHXyHFUGtTDM25Z4a1Prp5ax9JW0xx FTt7TRIxCTVTrCHWliEk2SiUbje9PWl3lCIPITOt7B9ZW5jYazA= =kAb0 -----END PGP SIGNATURE----- Merge tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux into soc/dt RISC-V Devicetrees for v6.11 Sopgho: Add clock support for SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux: riscv: dts: add clock generator for Sophgo SG2042 SoC Link: https://lore.kernel.org/r/PN1P287MB281861EA2B1706B430D2FA3EFEDB2@PN1P287MB2818.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2024-07-09 10:50:42 +02:00
..
cv18xx.dtsi	riscv: dts: sophgo: use real clock for sdhci	2024-04-22 08:31:05 +08:00
cv1800b-milkv-duo.dts	riscv: dts: sophgo: disable write-protection for milkv duo	2024-06-19 08:46:03 +08:00
cv1800b.dtsi	riscv: dts: sophgo: add reserved memory node for CV1800B	2024-04-23 16:38:09 +08:00
cv1812h-huashan-pi.dts	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
cv1812h.dtsi	riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC	2024-04-11 15:28:56 +08:00
Makefile	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
sg2042-cpus.dtsi	riscv: dts: add initial Sophgo SG2042 SoC device tree	2023-10-07 11:16:51 +01:00
sg2042-milkv-pioneer.dts	riscv: dts: add clock generator for Sophgo SG2042 SoC	2024-07-09 08:19:52 +08:00
sg2042.dtsi	riscv: dts: add clock generator for Sophgo SG2042 SoC	2024-07-09 08:19:52 +08:00