Use opcodes available to both rv32 and rv64 in uleb128 module linking
test.
Fixes: af71bc1949
("riscv: Add tests for riscv module loading")
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Closes: https://lore.kernel.org/lkml/1d7c71ee-5742-4df4-b8ef-a2aea0a624eb@infradead.org/
Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20231122-module_fixup-v2-1-dfb9565e9ea5@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
31 lines
504 B
ArmAsm
31 lines
504 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Rivos Inc.
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*/
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.text
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.global test_uleb_basic
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test_uleb_basic:
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lw a0, second
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addi a0, a0, -127
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ret
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.global test_uleb_large
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test_uleb_large:
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lw a0, fourth
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addi a0, a0, -0x07e8
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ret
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.data
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first:
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.space 127
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second:
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.reloc second, R_RISCV_SET_ULEB128, second
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.reloc second, R_RISCV_SUB_ULEB128, first
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.word 0
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third:
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.space 1000
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fourth:
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.reloc fourth, R_RISCV_SET_ULEB128, fourth
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.reloc fourth, R_RISCV_SUB_ULEB128, third
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.word 0
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