70b5ffb393
To support multi-GT configurations, we need to generate
independent debug files for each GT.
To achieve this create a separate directory for each GT under the
debugfs directory. For instance, in a system with two GTs, the
debugfs structure would look like this:
/sys/kernel/debug/dri
└── 0
├── gt0
│ ├── drpc
│ ├── engines
│ ├── forcewake
│ ├── frequency
│ └── rps_boost
└── gt1
: ├── drpc
: ├── engines
: ├── forcewake
├── frequency
└── rps_boost
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230318203616.183765-2-andi.shyti@linux.intel.com
119 lines
2.7 KiB
C
119 lines
2.7 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#include <linux/debugfs.h>
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#include "i915_drv.h"
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#include "intel_gt.h"
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#include "intel_gt_debugfs.h"
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#include "intel_gt_engines_debugfs.h"
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#include "intel_gt_mcr.h"
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#include "intel_gt_pm_debugfs.h"
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#include "intel_sseu_debugfs.h"
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#include "uc/intel_uc_debugfs.h"
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int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val)
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{
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int ret = intel_gt_terminally_wedged(gt);
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switch (ret) {
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case -EIO:
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*val = 1;
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return 0;
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case 0:
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*val = 0;
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return 0;
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default:
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return ret;
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}
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}
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void intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val)
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{
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/* Flush any previous reset before applying for a new one */
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wait_event(gt->reset.queue,
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!test_bit(I915_RESET_BACKOFF, >->reset.flags));
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intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE,
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"Manually reset engine mask to %llx", val);
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}
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/*
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* keep the interface clean where the first parameter
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* is a 'struct intel_gt *' instead of 'void *'
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*/
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static int __intel_gt_debugfs_reset_show(void *data, u64 *val)
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{
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return intel_gt_debugfs_reset_show(data, val);
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}
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static int __intel_gt_debugfs_reset_store(void *data, u64 val)
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{
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intel_gt_debugfs_reset_store(data, val);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
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__intel_gt_debugfs_reset_store, "%llu\n");
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static int steering_show(struct seq_file *m, void *data)
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{
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struct drm_printer p = drm_seq_file_printer(m);
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struct intel_gt *gt = m->private;
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intel_gt_mcr_report_steering(&p, gt, true);
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return 0;
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}
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DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering);
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static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
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{
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static const struct intel_gt_debugfs_file files[] = {
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{ "reset", &reset_fops, NULL },
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{ "steering", &steering_fops },
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};
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intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
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}
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void intel_gt_debugfs_register(struct intel_gt *gt)
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{
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struct dentry *root;
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char gtname[4];
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if (!gt->i915->drm.primary->debugfs_root)
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return;
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snprintf(gtname, sizeof(gtname), "gt%u", gt->info.id);
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root = debugfs_create_dir(gtname, gt->i915->drm.primary->debugfs_root);
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if (IS_ERR(root))
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return;
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gt_debugfs_register(gt, root);
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intel_gt_engines_debugfs_register(gt, root);
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intel_gt_pm_debugfs_register(gt, root);
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intel_sseu_debugfs_register(gt, root);
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intel_uc_debugfs_register(>->uc, root);
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}
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void intel_gt_debugfs_register_files(struct dentry *root,
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const struct intel_gt_debugfs_file *files,
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unsigned long count, void *data)
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{
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while (count--) {
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umode_t mode = files->fops->write ? 0644 : 0444;
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if (!files->eval || files->eval(data))
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debugfs_create_file(files->name,
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mode, root, data,
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files->fops);
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files++;
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}
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}
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