bc2373a58a
The TSC frequency information is required for the event metrics with the literal, system_tsc_freq. For the newer Intel platform, the TSC frequency information can be retrieved from the CPUID leaf 0x15. If the TSC frequency information isn't present the /proc/cpuinfo approach is used. Refactor cpuid() for this use. Note, the previous stack pushing/popping approach was broken on x86-64 that has stack red zones that would be clobbered. Committer testing: Before: $ perf record sleep 0.0001 [ perf record: Woken up 1 times to write data ] $ perf report --header-only |& grep cpuid # cpuid : AuthenticAMD,25,33,0 $ After the patch: $ perf record sleep 0.0001 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.002 MB perf.data (8 samples) ] $ perf report --header-only |& grep cpuid # cpuid : AuthenticAMD,25,33,0 $ Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Caleb Biggers <caleb.biggers@intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kshipra Bopardikar <kshipra.bopardikar@intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Perry Taylor <perry.taylor@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Link: https://lore.kernel.org/r/20220718164312.3994191-2-irogers@google.com Signed-off-by: Ian Rogers <irogers@google.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
34 lines
833 B
C
34 lines
833 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
#ifndef PERF_CPUID_H
|
|
#define PERF_CPUID_H 1
|
|
|
|
|
|
static inline void
|
|
cpuid(unsigned int op, unsigned int op2, unsigned int *a, unsigned int *b,
|
|
unsigned int *c, unsigned int *d)
|
|
{
|
|
/*
|
|
* Preserve %ebx/%rbx register by either placing it in %rdi or saving it
|
|
* on the stack - x86-64 needs to avoid the stack red zone. In PIC
|
|
* compilations %ebx contains the address of the global offset
|
|
* table. %rbx is occasionally used to address stack variables in
|
|
* presence of dynamic allocas.
|
|
*/
|
|
asm(
|
|
#if defined(__x86_64__)
|
|
"mov %%rbx, %%rdi\n"
|
|
"cpuid\n"
|
|
"xchg %%rdi, %%rbx\n"
|
|
#else
|
|
"pushl %%ebx\n"
|
|
"cpuid\n"
|
|
"movl %%ebx, %%edi\n"
|
|
"popl %%ebx\n"
|
|
#endif
|
|
: "=a"(*a), "=D"(*b), "=c"(*c), "=d"(*d)
|
|
: "a"(op), "2"(op2));
|
|
}
|
|
|
|
void get_cpuid_0(char *vendor, unsigned int *lvl);
|
|
|
|
#endif
|