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linux/drivers/gpu/drm/amd/display/dc/calcs
Alex Deucher 88d5cb2517 drm/amdgpu/display: drop DCN support for aarch64
From Ard:

"Simply disabling -mgeneral-regs-only left and right is risky, given that
the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
and GCC is known to use SIMD registers for spilling, and may invent
other uses of the FP/SIMD register file that have nothing to do with the
floating point code in question. Note that putting kernel_neon_begin()
and kernel_neon_end() around the code that does use FP is not sufficient
here, the problem is in all the other code that may be emitted with
references to SIMD registers in it.

So the only way to do this properly is to put all floating point code in
a separate compilation unit, and only compile that unit with
-mgeneral-regs-only."

Disable support until the code can be properly refactored to support this
properly on aarch64.

Acked-by: Will Deacon <will@kernel.org>
Reported-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:35:53 -05:00
..
bw_fixed.c amdgpu/dc: allow inlining constant int to fixed a lot better. 2017-09-29 13:03:35 -04:00
calcs_logger.h drm/amd/display: Convert remaining loggers off dc_logger 2018-07-13 14:48:42 -05:00
custom_float.c drm/amd/display: get rid of 32.32 unsigned fixed point 2018-05-18 16:08:21 -05:00
dce_calcs.c drm/amd: fix typoes 2020-11-02 15:33:46 -05:00
dcn_calc_auto.c drm/amd/display: Fix incorrect dcn1 bandwidth calculations 2020-07-01 01:59:20 -04:00
dcn_calc_auto.h drm/amd/display: make clk mgr soc specific 2019-05-31 10:39:29 -05:00
dcn_calc_math.c drm/amd/display: add some math functions for dcn_calc_math 2019-06-11 12:49:21 -05:00
dcn_calcs.c drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
Makefile drm/amdgpu/display: drop DCN support for aarch64 2021-01-05 11:35:53 -05:00