8519873d19
With the integration of chip-id detection scheme in kernel[1], there is no specific need to maintain multitudes of SoC specific config options, discussed as per [2], we have deprecated the usage in other places for v5.10-rc1. Fix the missing user so that we can clean up the configs in v5.11. [1] drivers/soc/ti/k3-socinfo.c commit907a2b7e2f("soc: ti: add k3 platforms chipid module driver") [2] https://lore.kernel.org/linux-arm-kernel/20200908112534.t5bgrjf7y3a6l2ss@akan/ Fixes:afba7e6c5f("drm: bridge: cdns-mhdp8546: Add TI J721E wrapper") Cc: Swapnil Jakhade <sjakhade@cadence.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Yuti Amonkar <yamonkar@cadence.com> Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20201026165441.22894-1-nm@ti.com
24 lines
709 B
Text
24 lines
709 B
Text
# SPDX-License-Identifier: GPL-2.0-only
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config DRM_CDNS_MHDP8546
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tristate "Cadence DPI/DP bridge"
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select DRM_KMS_HELPER
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select DRM_PANEL_BRIDGE
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depends on OF
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help
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Support Cadence DPI to DP bridge. This is an internal
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bridge and is meant to be directly embedded in a SoC.
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It takes a DPI stream as input and outputs it encoded
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in DP format.
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if DRM_CDNS_MHDP8546
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config DRM_CDNS_MHDP8546_J721E
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depends on ARCH_K3 || COMPILE_TEST
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bool "J721E Cadence DPI/DP wrapper support"
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default y
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help
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Support J721E Cadence DPI/DP wrapper. This is a wrapper
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which adds support for J721E related platform ops. It
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initializes the J721E Display Port and sets up the
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clock and data muxes.
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endif
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