6e6cb758e0
The DP-HDMI2.1 PCON spec provides way for a source to set PPS parameters: slice height, slice width and bits_per_pixel, based on the HDMI2.1 sink capabilities. The DSC encoder of the PCON will respect these parameters, while preparing the 128 byte PPS. This patch adds helper functions to calculate these PPS paremeters as per the HDMI2.1 specification. v2: Addressed review comments given by Uma Shankar: -added documentation for functions -fixed typos and errors Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> [Jani: Fixed checkpatch SUSPECT_CODE_INDENT, TYPO_SPELLING] Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-14-ankit.k.nautiyal@intel.com
61 lines
2.3 KiB
C
61 lines
2.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_HDMI_H__
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#define __INTEL_HDMI_H__
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#include <linux/hdmi.h>
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#include <linux/types.h>
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#include "i915_reg.h"
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struct drm_connector;
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struct drm_encoder;
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struct drm_i915_private;
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struct intel_connector;
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struct intel_digital_port;
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struct intel_encoder;
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struct intel_crtc_state;
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struct intel_hdmi;
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struct drm_connector_state;
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union hdmi_infoframe;
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enum port;
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void intel_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg,
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enum port port);
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void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
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struct intel_connector *intel_connector);
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struct intel_hdmi *enc_to_intel_hdmi(struct intel_encoder *encoder);
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int intel_hdmi_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state);
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bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
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struct drm_connector *connector,
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bool high_tmds_clock_ratio,
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bool scrambling);
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void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
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void intel_infoframe_init(struct intel_digital_port *dig_port);
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u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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u32 intel_hdmi_infoframe_enable(unsigned int type);
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void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state);
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void intel_read_infoframe(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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enum hdmi_infoframe_type type,
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union hdmi_infoframe *frame);
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bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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bool intel_hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, int bpc,
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bool has_hdmi_sink, bool ycbcr420_output);
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int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
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int num_slices, int output_format, bool hdmi_all_bpp,
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int hdmi_max_chunk_bytes);
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int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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int src_max_slices, int src_max_slice_width,
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int hdmi_max_slices, int hdmi_throughput);
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int intel_hdmi_dsc_get_slice_height(int vactive);
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#endif /* __INTEL_HDMI_H__ */
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