068cae743c
There's a number of places that require this data, so let's separate out the calculations to ensure they remain consistent. This is incorrect for GM200 and newer, but will produce the same results as we did before. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
128 lines
4.1 KiB
C
128 lines
4.1 KiB
C
/*
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* Copyright 2015 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "ctxgf100.h"
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/*******************************************************************************
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* PGRAPH context implementation
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******************************************************************************/
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void
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gm200_grctx_generate_r419a3c(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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nvkm_mask(device, 0x419a3c, 0x00000014, 0x00000000);
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}
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static void
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gm200_grctx_generate_r418e94(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000);
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nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000);
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}
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void
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gm200_grctx_generate_smid_config(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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const u32 dist_nr = DIV_ROUND_UP(gr->tpc_total, 4);
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u32 dist[TPC_MAX / 4] = {};
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u32 gpcs[GPC_MAX] = {};
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u8 sm, i;
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for (sm = 0; sm < gr->sm_nr; sm++) {
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const u8 gpc = gr->sm[sm].gpc;
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const u8 tpc = gr->sm[sm].tpc;
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dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8);
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gpcs[gpc] |= sm << (tpc * 8);
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}
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for (i = 0; i < dist_nr; i++)
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nvkm_wr32(device, 0x405b60 + (i * 4), dist[i]);
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for (i = 0; i < gr->gpc_nr; i++)
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nvkm_wr32(device, 0x405ba0 + (i * 4), gpcs[i]);
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}
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void
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gm200_grctx_generate_tpc_mask(struct gf100_gr *gr)
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{
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u32 tmp, i;
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for (tmp = 0, i = 0; i < gr->gpc_nr; i++)
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tmp |= ((1 << gr->tpc_nr[i]) - 1) << (i * gr->func->tpc_nr);
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nvkm_wr32(gr->base.engine.subdev.device, 0x4041c4, tmp);
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}
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void
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gm200_grctx_generate_r406500(struct gf100_gr *gr)
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{
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nvkm_wr32(gr->base.engine.subdev.device, 0x406500, 0x00000000);
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}
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void
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gm200_grctx_generate_dist_skip_table(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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u32 data[8] = {};
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int gpc, ppc, i;
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) {
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u8 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc];
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u8 ppc_tpcm = gr->ppc_tpc_mask[gpc][ppc];
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while (ppc_tpcs-- > gr->ppc_tpc_min)
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ppc_tpcm &= ppc_tpcm - 1;
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ppc_tpcm ^= gr->ppc_tpc_mask[gpc][ppc];
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((u8 *)data)[gpc] |= ppc_tpcm;
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}
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}
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for (i = 0; i < ARRAY_SIZE(data); i++)
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nvkm_wr32(device, 0x4064d0 + (i * 0x04), data[i]);
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}
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const struct gf100_grctx_func
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gm200_grctx = {
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.main = gf100_grctx_generate_main,
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.unkn = gk104_grctx_generate_unkn,
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.bundle = gm107_grctx_generate_bundle,
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.bundle_size = 0x3000,
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.bundle_min_gpm_fifo_depth = 0x180,
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.bundle_token_limit = 0x780,
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.pagepool = gm107_grctx_generate_pagepool,
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.pagepool_size = 0x20000,
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.attrib = gm107_grctx_generate_attrib,
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.attrib_nr_max = 0x600,
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.attrib_nr = 0x400,
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.alpha_nr_max = 0x1800,
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.alpha_nr = 0x1000,
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.sm_id = gm107_grctx_generate_sm_id,
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.rop_mapping = gf117_grctx_generate_rop_mapping,
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.dist_skip_table = gm200_grctx_generate_dist_skip_table,
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.r406500 = gm200_grctx_generate_r406500,
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.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
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.tpc_mask = gm200_grctx_generate_tpc_mask,
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.smid_config = gm200_grctx_generate_smid_config,
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.r418e94 = gm200_grctx_generate_r418e94,
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.r419a3c = gm200_grctx_generate_r419a3c,
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};
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