0ac7facb70
There is no BAR2 on GP10B and there is no need to map through BAR2 because all memory is shared between the GPU and the CPU. Add a custom implementation of the fault sub-device that uses nvkm_memory_addr() instead of nvkm_memory_bar2() to return the address of a pinned fault buffer. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
#ifndef __NVKM_FAULT_PRIV_H__
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#define __NVKM_FAULT_PRIV_H__
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#define nvkm_fault_buffer(p) container_of((p), struct nvkm_fault_buffer, object)
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#define nvkm_fault(p) container_of((p), struct nvkm_fault, subdev)
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#include <subdev/fault.h>
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#include <core/event.h>
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#include <core/object.h>
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struct nvkm_fault_buffer {
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struct nvkm_object object;
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struct nvkm_fault *fault;
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int id;
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int entries;
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u32 get;
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u32 put;
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struct nvkm_memory *mem;
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u64 addr;
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};
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int nvkm_fault_new_(const struct nvkm_fault_func *, struct nvkm_device *,
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int index, struct nvkm_fault **);
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struct nvkm_fault_func {
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int (*oneinit)(struct nvkm_fault *);
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void (*init)(struct nvkm_fault *);
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void (*fini)(struct nvkm_fault *);
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void (*intr)(struct nvkm_fault *);
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struct {
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int nr;
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u32 entry_size;
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void (*info)(struct nvkm_fault_buffer *);
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u64 (*pin)(struct nvkm_fault_buffer *);
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void (*init)(struct nvkm_fault_buffer *);
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void (*fini)(struct nvkm_fault_buffer *);
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void (*intr)(struct nvkm_fault_buffer *, bool enable);
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} buffer;
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struct {
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struct nvkm_sclass base;
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int rp;
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} user;
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};
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void gp100_fault_buffer_intr(struct nvkm_fault_buffer *, bool enable);
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void gp100_fault_buffer_fini(struct nvkm_fault_buffer *);
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void gp100_fault_buffer_init(struct nvkm_fault_buffer *);
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u64 gp100_fault_buffer_pin(struct nvkm_fault_buffer *);
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void gp100_fault_buffer_info(struct nvkm_fault_buffer *);
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void gp100_fault_intr(struct nvkm_fault *);
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u64 gp10b_fault_buffer_pin(struct nvkm_fault_buffer *);
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int gv100_fault_oneinit(struct nvkm_fault *);
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int nvkm_ufault_new(struct nvkm_device *, const struct nvkm_oclass *,
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void *, u32, struct nvkm_object **);
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#endif
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