176ada03e3
Turing introduced a new simplified page kind scheme, reducing the number of possible page kinds from 256 to 16. It also is the first NVIDIA GPU in which the highest possible page kind value is not reserved as an "invalid" page kind. To address this, the invalid page kind is made an explicit property of the MMU HAL, and a new table of page kinds is added to the tu102 MMU HAL. One hardware change not addressed here is that 0x00 is technically no longer a supported page kind, and pitch surfaces are instead intended to share the block-linear generic page kind 0x06. However, because that will be a rather invasive change to nouveau and 0x00 still works fine in practice on Turing hardware, addressing this new behavior is deferred. Signed-off-by: James Jones <jajones@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NVKM_MMU_PRIV_H__
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#define __NVKM_MMU_PRIV_H__
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#define nvkm_mmu(p) container_of((p), struct nvkm_mmu, subdev)
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#include <subdev/mmu.h>
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void nvkm_mmu_ctor(const struct nvkm_mmu_func *, struct nvkm_device *,
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int index, struct nvkm_mmu *);
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int nvkm_mmu_new_(const struct nvkm_mmu_func *, struct nvkm_device *,
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int index, struct nvkm_mmu **);
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struct nvkm_mmu_func {
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void (*init)(struct nvkm_mmu *);
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u8 dma_bits;
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struct {
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struct nvkm_sclass user;
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} mmu;
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struct {
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struct nvkm_sclass user;
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int (*vram)(struct nvkm_mmu *, int type, u8 page, u64 size,
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void *argv, u32 argc, struct nvkm_memory **);
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int (*umap)(struct nvkm_mmu *, struct nvkm_memory *, void *argv,
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u32 argc, u64 *addr, u64 *size, struct nvkm_vma **);
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} mem;
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struct {
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struct nvkm_sclass user;
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int (*ctor)(struct nvkm_mmu *, bool managed, u64 addr, u64 size,
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void *argv, u32 argc, struct lock_class_key *,
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const char *name, struct nvkm_vmm **);
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bool global;
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u32 pd_offset;
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} vmm;
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const u8 *(*kind)(struct nvkm_mmu *, int *count, u8 *invalid);
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bool kind_sys;
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};
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extern const struct nvkm_mmu_func nv04_mmu;
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const u8 *nv50_mmu_kind(struct nvkm_mmu *, int *count, u8 *invalid);
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const u8 *gf100_mmu_kind(struct nvkm_mmu *, int *count, u8 *invalid);
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const u8 *gm200_mmu_kind(struct nvkm_mmu *, int *, u8 *);
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struct nvkm_mmu_pt {
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union {
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struct nvkm_mmu_ptc *ptc;
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struct nvkm_mmu_ptp *ptp;
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};
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struct nvkm_memory *memory;
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bool sub;
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u16 base;
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u64 addr;
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struct list_head head;
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};
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void nvkm_mmu_ptc_dump(struct nvkm_mmu *);
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struct nvkm_mmu_pt *
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nvkm_mmu_ptc_get(struct nvkm_mmu *, u32 size, u32 align, bool zero);
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void nvkm_mmu_ptc_put(struct nvkm_mmu *, bool force, struct nvkm_mmu_pt **);
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#endif
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