1bab09acc9
This enables BLCG optimization for kepler1. When using clockgating, nvidia's firmware has a set of registers which are initially programmed by the vbios with various engine delays and other mysterious settings that are safe enough to bring up the GPU. However, the values used by the vbios are more power hungry then they need to be, so the nvidia driver writes it's own more optimized set of BLCG settings before enabling CG_CTRL. This adds support for programming the optimized BLCG values during engine/subdev init, which enables rather significant power savings. This introduces the nvkm_therm_clkgate_init() helper, which we use to program the optimized BLCG settings before enabling clockgating with nvkm_therm_clkgate_enable. As well, this commit shares a lot more code with Fermi since BLCG is mostly the same there as far as we can tell. In the future, it's likely we'll reformat the clkgate_packs for kepler1 so that they share a list of mmio packs with Fermi. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
136 lines
4 KiB
C
136 lines
4 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Lyude Paul
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*/
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#include <core/device.h>
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#include "priv.h"
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#include "gk104.h"
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void
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gk104_clkgate_enable(struct nvkm_therm *base)
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{
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struct gk104_therm *therm = gk104_therm(base);
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struct nvkm_device *dev = therm->base.subdev.device;
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const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
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int i;
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/* Program ENG_MANT, ENG_FILTER */
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for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
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if (!nvkm_device_subdev(dev, order[i].engine))
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continue;
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nvkm_mask(dev, 0x20200 + order[i].offset, 0xff00, 0x4500);
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}
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/* magic */
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nvkm_wr32(dev, 0x020288, therm->idle_filter->fecs);
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nvkm_wr32(dev, 0x02028c, therm->idle_filter->hubmmu);
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/* Enable clockgating (ENG_CLK = RUN->AUTO) */
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for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
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if (!nvkm_device_subdev(dev, order[i].engine))
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continue;
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nvkm_mask(dev, 0x20200 + order[i].offset, 0x00ff, 0x0045);
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}
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}
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void
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gk104_clkgate_fini(struct nvkm_therm *base, bool suspend)
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{
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struct gk104_therm *therm = gk104_therm(base);
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struct nvkm_device *dev = therm->base.subdev.device;
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const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
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int i;
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/* ENG_CLK = AUTO->RUN, ENG_PWR = RUN->AUTO */
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for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
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if (!nvkm_device_subdev(dev, order[i].engine))
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continue;
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nvkm_mask(dev, 0x20200 + order[i].offset, 0xff, 0x54);
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}
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}
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const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
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{ NVKM_ENGINE_GR, 0x00 },
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{ NVKM_ENGINE_MSPDEC, 0x04 },
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{ NVKM_ENGINE_MSPPP, 0x08 },
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{ NVKM_ENGINE_MSVLD, 0x0c },
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{ NVKM_ENGINE_CE0, 0x10 },
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{ NVKM_ENGINE_CE1, 0x14 },
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{ NVKM_ENGINE_MSENC, 0x18 },
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{ NVKM_ENGINE_CE2, 0x1c },
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{ NVKM_SUBDEV_NR, 0 },
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};
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const struct gf100_idle_filter gk104_idle_filter = {
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.fecs = 0x00001000,
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.hubmmu = 0x00001000,
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};
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static const struct nvkm_therm_func
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gk104_therm_func = {
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.init = gf119_therm_init,
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.fini = g84_therm_fini,
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.pwm_ctrl = gf119_fan_pwm_ctrl,
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.pwm_get = gf119_fan_pwm_get,
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.pwm_set = gf119_fan_pwm_set,
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.pwm_clock = gf119_fan_pwm_clock,
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.temp_get = g84_temp_get,
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.fan_sense = gt215_therm_fan_sense,
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.program_alarms = nvkm_therm_program_alarms_polling,
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.clkgate_init = gf100_clkgate_init,
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.clkgate_enable = gk104_clkgate_enable,
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.clkgate_fini = gk104_clkgate_fini,
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};
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static int
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gk104_therm_new_(const struct nvkm_therm_func *func,
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struct nvkm_device *device,
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int index,
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const struct gk104_clkgate_engine_info *clkgate_order,
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const struct gf100_idle_filter *idle_filter,
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struct nvkm_therm **ptherm)
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{
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struct gk104_therm *therm = kzalloc(sizeof(*therm), GFP_KERNEL);
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if (!therm)
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return -ENOMEM;
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nvkm_therm_ctor(&therm->base, device, index, func);
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*ptherm = &therm->base;
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therm->clkgate_order = clkgate_order;
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therm->idle_filter = idle_filter;
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return 0;
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}
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int
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gk104_therm_new(struct nvkm_device *device,
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int index, struct nvkm_therm **ptherm)
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{
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return gk104_therm_new_(&gk104_therm_func, device, index,
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gk104_clkgate_engine_info, &gk104_idle_filter,
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ptherm);
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}
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