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linux/drivers/gpu/drm/amd/display/dc/dcn20
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Alex Deucher 20f2ffe504 drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 
Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:11:37 -05:00
..
dcn20_dccg.c drm/amd/display: DPP DTO isn't update properly. 2020-03-19 00:03:04 -04:00
dcn20_dccg.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_dpp.c drm/amd/display: correct alpha_en programming for new pixel format 2020-07-01 01:59:19 -04:00
dcn20_dpp.h drm/amd/display: Indirect reg read macro with shift and mask 2020-01-16 14:13:53 -05:00
dcn20_dpp_cm.c drm/amd/display: Indirect reg read macro with shift and mask 2020-01-16 14:13:53 -05:00
dcn20_dsc.c drm/amd/display: Rename bytes_pp to the correct bits_pp 2020-07-27 16:23:21 -04:00
dcn20_dsc.h drm/amd/display: Add DSC_DBG_EN shift/mask for dcn3 2020-08-17 14:09:27 -04:00
dcn20_dwb.c drm/amd/display: [backport] dwb dm + efc support 2019-06-22 09:34:11 -05:00
dcn20_dwb.h drm/amd/display: Add DCN2 DWB 2019-06-21 18:59:35 -05:00
dcn20_dwb_scl.c drm/amd/display: Remove set but not used variables 'h_ratio_chroma', 'v_ratio_chroma' 2019-10-07 15:10:43 -05:00
dcn20_hubbub.c drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_hubbub.h drm/amd/display: correct rn NUM_VMID 2020-05-21 12:48:43 -04:00
dcn20_hubp.c drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_hubp.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_hwseq.c drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_hwseq.h drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2 2020-11-02 15:31:30 -05:00
dcn20_init.c drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2 2020-11-02 15:31:30 -05:00
dcn20_init.h drm/amd/display: cleanup of function pointer tables 2019-11-19 10:12:53 -05:00
dcn20_link_encoder.c drm/amd/display: Read VBIOS Golden Settings Tbl 2020-08-04 17:29:27 -04:00
dcn20_link_encoder.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_mmhubbub.c drm/amd/display: Add DCN2 MMHUBBUB 2019-06-21 18:59:34 -05:00
dcn20_mmhubbub.h drm/amd/display: Update register defines 2020-02-11 11:50:18 -05:00
dcn20_mpc.c drm/amd/display: Use cursor locking to prevent flip delays 2020-04-28 16:19:56 -04:00
dcn20_mpc.h drm/amd/display: Use cursor locking to prevent flip delays 2020-04-28 16:19:56 -04:00
dcn20_opp.c drm/amd/display: Raise DPG height during timing synchronization 2020-10-26 13:29:21 -04:00
dcn20_opp.h drm/amd/display: Raise DPG height during timing synchronization 2020-10-26 13:29:21 -04:00
dcn20_optc.c drm/amd/display: Fix OPTC_DATA_FORMAT programming 2020-10-05 15:16:57 -04:00
dcn20_optc.h drm/amd/display: add optc get crc support for timings with ODM/DSC 2020-04-22 18:11:47 -04:00
dcn20_resource.c drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
dcn20_resource.h drm/amd/display: add dcn21 bw validation 2020-10-26 13:27:40 -04:00
dcn20_stream_encoder.c drm/amd/display: Rename set_mst_bandwidth to align with DP spec 2020-09-15 17:52:41 -04:00
dcn20_stream_encoder.h drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP 2019-11-13 15:29:43 -05:00
dcn20_vmid.c drm/amd/display: Poll for GPUVM context ready (v2) 2019-07-18 14:18:09 -05:00
dcn20_vmid.h drm/amd/display: Update register defines 2020-02-11 11:50:18 -05:00
Makefile drm/amd/display: add DCN support for aarch64 2020-08-10 17:26:53 -04:00