136dfa5eda
The Shark machine sub-architecture (also known as DNARD, the DIGITAL Network Appliance Reference Design) lacks a maintainer able to apply and test patches to modernize the architecture. It is suspected that the current kernel, while it compiles, does not even boot on this machine. The listed maintainer has expressed that he will not be able to spend any time on the maintenance for the coming year. So let's delete it from the kernel for now. It can always be resurrected with git revert if maintenance is resumed. As the VIA82c505 PCI adapter was only used by this architecture, that gets deleted too. Cc: arm@kernel.org Cc: Alexander Schulz <alex@shark-linux.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* arch/arm/include/asm/mach/pci.h
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*
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* Copyright (C) 2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_PCI_H
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#define __ASM_MACH_PCI_H
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#include <linux/ioport.h>
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struct pci_sys_data;
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struct pci_ops;
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struct pci_bus;
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struct device;
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struct hw_pci {
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#ifdef CONFIG_PCI_DOMAINS
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int domain;
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#endif
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struct pci_ops *ops;
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int nr_controllers;
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void **private_data;
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int (*setup)(int nr, struct pci_sys_data *);
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struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
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void (*preinit)(void);
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void (*postinit)(void);
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u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
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int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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void (*add_bus)(struct pci_bus *bus);
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void (*remove_bus)(struct pci_bus *bus);
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};
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/*
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* Per-controller structure
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*/
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struct pci_sys_data {
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#ifdef CONFIG_PCI_DOMAINS
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int domain;
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#endif
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struct list_head node;
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int busnr; /* primary bus number */
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u64 mem_offset; /* bus->cpu memory mapping offset */
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unsigned long io_offset; /* bus->cpu IO mapping offset */
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struct pci_bus *bus; /* PCI bus */
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struct list_head resources; /* root bus resources (apertures) */
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struct resource io_res;
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char io_res_name[12];
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/* Bridge swizzling */
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u8 (*swizzle)(struct pci_dev *, u8 *);
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/* IRQ mapping */
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int (*map_irq)(const struct pci_dev *, u8, u8);
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/* Resource alignement requirements */
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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void (*add_bus)(struct pci_bus *bus);
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void (*remove_bus)(struct pci_bus *bus);
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void *private_data; /* platform controller private data */
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};
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/*
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* Call this with your hw_pci struct to initialise the PCI system.
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*/
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void pci_common_init_dev(struct device *, struct hw_pci *);
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/*
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* Compatibility wrapper for older platforms that do not care about
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* passing the parent device.
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*/
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static inline void pci_common_init(struct hw_pci *hw)
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{
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pci_common_init_dev(NULL, hw);
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}
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/*
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* Setup early fixed I/O mapping.
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*/
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#if defined(CONFIG_PCI)
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extern void pci_map_io_early(unsigned long pfn);
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#else
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static inline void pci_map_io_early(unsigned long pfn) {}
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#endif
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/*
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* PCI controllers
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*/
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extern struct pci_ops iop3xx_ops;
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extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
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extern void iop3xx_pci_preinit(void);
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extern void iop3xx_pci_preinit_cond(void);
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extern struct pci_ops dc21285_ops;
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extern int dc21285_setup(int nr, struct pci_sys_data *);
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extern void dc21285_preinit(void);
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extern void dc21285_postinit(void);
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#endif /* __ASM_MACH_PCI_H */
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