Marc Zyngier 4053b6b43f dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit ... A common mistake when writing a device tree for a platform that is using GICv3 with ancient CPUs is to overlook the MMIO frames that implement the GICv2 compatibility feature, because this feature is implemented by the CPUs and not by the GIC itself. The compatibility feature itself is optional (all the modern implementations have dropped it), but is present in all the ARM Ltd implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73), and many others from various implementers. Make it explicit that GICC, GICH and GICV are required for these CPUs. Also take this opportunity to update my email address, as people keep sending them to the wrong place... Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org		2022-05-04 15:43:12 +01:00
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bindings	dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit	2022-05-04 15:43:12 +01:00
changesets.rst	docs: dt: Make 'Devicetree' wording more consistent	2021-03-27 12:58:04 -06:00
dynamic-resolution-notes.rst	docs: dt: Make 'Devicetree' wording more consistent	2021-03-27 12:58:04 -06:00
index.rst	docs: dt: Add DT API documentation	2021-03-27 12:59:03 -06:00
kernel-api.rst	docs: dt: Add DT API documentation	2021-03-27 12:59:03 -06:00
of_unittest.rst	of: unittest: add program to process EXPECT messages	2022-02-28 15:20:32 -06:00
overlay-notes.rst	docs: dt: Make 'Devicetree' wording more consistent	2021-03-27 12:58:04 -06:00
usage-model.rst	docs: dt: Make 'Devicetree' wording more consistent	2021-03-27 12:58:04 -06:00