Eric Yang 550ff7ad37 drm/amd/display: change zstate allow msg condition ... [Why] PMFW message which previously thought to only control Z9 controls both Z9 and Z10. Also HW design team requested that Z9 must only be supported on eDP due to content protection interop. [How] Change zstate support condition to match updated policy Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-07-23 10:07:59 -04:00
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dce60	drm/amd/display: dc/clk_mgr: make function static	2020-09-17 21:21:40 -04:00
dce100	drm/amd/display: remove redundant assignment to variable dp_ref_clk_khz	2020-04-22 18:11:45 -04:00
dce110	drm/amd/display: correct asic type check V2	2020-10-27 12:01:16 -04:00
dce112	drm/amd/display: correct asic type check V2	2020-10-27 12:01:16 -04:00
dce120	drm/amd/display: Copy max_clks_by_state after dce_clk_mgr_construct	2019-07-18 14:18:09 -05:00
dcn10	drm/amd/display: Round KHz up when calculating clock requests	2021-07-08 15:16:44 -04:00
dcn20	drm/amd/display: Round KHz up when calculating clock requests	2021-07-08 15:16:44 -04:00
dcn21	drm/amd/display: Round KHz up when calculating clock requests	2021-07-08 15:16:44 -04:00
dcn30	drm/amd/display: Populate socclk entries for dcn3.02/3.03	2021-07-23 10:07:58 -04:00
dcn31	drm/amd/display: change zstate allow msg condition	2021-07-23 10:07:59 -04:00
dcn301	drm/amd/display: Prevent Diags from entering S2	2021-07-21 13:39:25 -04:00
clk_mgr.c	drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN	2021-06-22 16:51:45 -04:00
Makefile	drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN	2021-06-22 16:51:45 -04:00