During GPU reset, when receiving a DMCUB OUTBUX0 interrupt,
DAL code will set it to be OUTBOX interrupt and sets hw interrupt.
However, OUTBOX interrupt is not registered yet, so a NULL pointer
access will be executed.
Call Trace:
dal_irq_service_set+0x30/0x90 [amdgpu]
dc_interrupt_set+0x24/0x30 [amdgpu]
amdgpu_dm_set_dmub_outbox_irq_state+0x22/0x30 [amdgpu]
amdgpu_irq_update+0x77/0xa0 [amdgpu]
amdgpu_irq_gpu_reset_resume_helper+0x67/0xa0 [amdgpu]
amdgpu_do_asic_reset+0x219/0x260 [amdgpu]
amdgpu_device_gpu_recover.cold+0x8c5/0xb64 [amdgpu]
amdgpu_debugfs_gpu_recover_show+0x2c/0x60 [amdgpu]
seq_read_iter+0xc2/0x450
? do_anonymous_page+0x22c/0x3b0
seq_read+0xf9/0x140
full_proxy_read+0x5c/0x90
vfs_read+0xaa/0x190
ksys_read+0x67/0xe0
__x64_sys_read+0x1a/0x20
Fixes: effbf6ca7e
("drm/amdgpu/display: remove an old DCN3 guard")
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-and-tested-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
173 lines
4.1 KiB
C
173 lines
4.1 KiB
C
/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include <linux/slab.h>
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#include "dm_services.h"
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#include "include/irq_service_interface.h"
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#include "include/logger_interface.h"
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#include "dce110/irq_service_dce110.h"
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#if defined(CONFIG_DRM_AMD_DC_SI)
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#include "dce60/irq_service_dce60.h"
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#endif
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#include "dce80/irq_service_dce80.h"
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#include "dce120/irq_service_dce120.h"
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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#include "dcn10/irq_service_dcn10.h"
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#endif
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#include "reg_helper.h"
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#include "irq_service.h"
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#define CTX \
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irq_service->ctx
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#define DC_LOGGER \
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irq_service->ctx->logger
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void dal_irq_service_construct(
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struct irq_service *irq_service,
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struct irq_service_init_data *init_data)
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{
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if (!init_data || !init_data->ctx) {
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BREAK_TO_DEBUGGER();
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return;
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}
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irq_service->ctx = init_data->ctx;
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}
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void dal_irq_service_destroy(struct irq_service **irq_service)
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{
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if (!irq_service || !*irq_service) {
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BREAK_TO_DEBUGGER();
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return;
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}
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kfree(*irq_service);
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*irq_service = NULL;
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}
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static const struct irq_source_info *find_irq_source_info(
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struct irq_service *irq_service,
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enum dc_irq_source source)
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{
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if (source >= DAL_IRQ_SOURCES_NUMBER || source < DC_IRQ_SOURCE_INVALID)
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return NULL;
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return &irq_service->info[source];
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}
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void dal_irq_service_set_generic(
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struct irq_service *irq_service,
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const struct irq_source_info *info,
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bool enable)
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{
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uint32_t addr = info->enable_reg;
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uint32_t value = dm_read_reg(irq_service->ctx, addr);
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value = (value & ~info->enable_mask) |
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(info->enable_value[enable ? 0 : 1] & info->enable_mask);
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dm_write_reg(irq_service->ctx, addr, value);
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}
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bool dal_irq_service_set(
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struct irq_service *irq_service,
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enum dc_irq_source source,
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bool enable)
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{
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const struct irq_source_info *info =
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find_irq_source_info(irq_service, source);
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if (!info) {
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DC_LOG_ERROR("%s: cannot find irq info table entry for %d\n",
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__func__,
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source);
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return false;
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}
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dal_irq_service_ack(irq_service, source);
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if (info->funcs && info->funcs->set)
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return info->funcs->set(irq_service, info, enable);
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dal_irq_service_set_generic(irq_service, info, enable);
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return true;
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}
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void dal_irq_service_ack_generic(
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struct irq_service *irq_service,
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const struct irq_source_info *info)
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{
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uint32_t addr = info->ack_reg;
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uint32_t value = dm_read_reg(irq_service->ctx, addr);
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value = (value & ~info->ack_mask) |
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(info->ack_value & info->ack_mask);
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dm_write_reg(irq_service->ctx, addr, value);
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}
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bool dal_irq_service_ack(
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struct irq_service *irq_service,
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enum dc_irq_source source)
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{
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const struct irq_source_info *info =
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find_irq_source_info(irq_service, source);
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if (!info) {
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DC_LOG_ERROR("%s: cannot find irq info table entry for %d\n",
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__func__,
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source);
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return false;
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}
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if (info->funcs && info->funcs->ack)
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return info->funcs->ack(irq_service, info);
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dal_irq_service_ack_generic(irq_service, info);
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return true;
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}
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enum dc_irq_source dal_irq_service_to_irq_source(
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struct irq_service *irq_service,
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uint32_t src_id,
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uint32_t ext_id)
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{
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return irq_service->funcs->to_dal_irq_source(
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irq_service,
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src_id,
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ext_id);
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}
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