Anup Patel 2333df5ae5 irqchip: Add RISC-V advanced PLIC driver for direct-mode ... The RISC-V advanced interrupt architecture (AIA) specification defines advanced platform-level interrupt controller (APLIC) which has two modes of operation: 1) Direct mode and 2) MSI mode. (For more details, refer https://github.com/riscv/riscv-aia) In APLIC direct-mode, wired interrupts are forwared to CPUs (or HARTs) as a local external interrupt. Add a platform irqchip driver for the RISC-V APLIC direct-mode to support RISC-V platforms having only wired interrupts. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Björn Töpel <bjorn@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20240307140307.646078-7-apatel@ventanamicro.com		2024-03-25 17:38:29 +01:00
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arm-gic-common.h	irqchip/gic: Split vGIC probing information from the GIC code	2021-06-01 10:45:58 +01:00
arm-gic-v3.h	irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES}	2022-05-04 14:09:52 +01:00
arm-gic-v4.h
arm-gic.h	irqchip/gic: Drop support for board files	2023-04-08 10:50:04 +01:00
arm-vgic-info.h	KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation	2021-06-01 10:45:59 +01:00
arm-vic.h
chained_irq.h
irq-bcm2836.h
irq-davinci-aintc.h
irq-davinci-cp-intc.h
irq-madera.h
irq-omap-intc.h
irq-partition-percpu.h
irq-sa11x0.h
riscv-aplic.h	irqchip: Add RISC-V advanced PLIC driver for direct-mode	2024-03-25 17:38:29 +01:00
riscv-imsic.h	irqchip: Add RISC-V incoming MSI controller early driver	2024-03-25 17:38:28 +01:00
xtensa-mx.h
xtensa-pic.h