0fdebc5ec2
Based on the normalized pattern:
this file is licensed under the terms of the gnu general public
license version 2 this program is licensed as is without any warranty
of any kind whether express or implied
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
85 lines
1.7 KiB
Text
85 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Device Tree Source for OMAP443x SoC
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "omap4.dtsi"
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/ {
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cpus {
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cpu0: cpu@0 {
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/* OMAP443x variants OPP50-OPPNT */
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operating-points = <
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/* kHz uV */
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300000 1025000
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600000 1200000
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800000 1313000
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1008000 1375000
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>;
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clock-latency = <300000>; /* From legacy driver */
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/* cooling options */
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#cooling-cells = <2>; /* min followed by max */
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};
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};
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thermal-zones {
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#include "omap4-cpu-thermal.dtsi"
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};
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ocp {
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/* 4430 has only gpio_86 tshut and no talert interrupt */
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bandgap: bandgap@4a002260 {
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reg = <0x4a002260 0x4
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0x4a00232C 0x4>;
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compatible = "ti,omap4430-bandgap";
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gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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#thermal-sensor-cells = <0>;
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};
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};
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ocp {
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abb_mpu: regulator-abb-mpu {
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status = "okay";
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reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
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reg-names = "base-address", "int-address";
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ti,abb_info = <
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/*uV ABB efuse rbb_m fbb_m vset_m*/
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1025000 0 0 0 0 0
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1200000 0 0 0 0 0
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1313000 0 0 0 0 0
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1375000 1 0 0 0 0
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1389000 1 0 0 0 0
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>;
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};
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/* Default unused, just provide register info for record */
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abb_iva: regulator-abb-iva {
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reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
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reg-names = "base-address", "int-address";
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};
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};
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};
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&cpu_thermal {
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coefficients = <0 20000>;
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};
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/include/ "omap443x-clocks.dtsi"
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/*
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* Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
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*/
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&sgx_module {
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assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
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<&dpll_per_m7x2_ck>;
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assigned-clock-rates = <0>, <307200000>;
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assigned-clock-parents = <&dpll_per_m7x2_ck>;
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};
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