0dcd27bda2
MX8 SoC is comprised of a few HW subsystems while some of them can be reused in the different SoCs. So let's re-orginize them into subsystems in device tree as well for the possible reuse of the common part. Note, as there's still no devices of hsio subsys, so removed it first instead of creating a subsys headfile with no devices. They will be added back when new devices added. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
18 lines
401 B
Text
18 lines
401 B
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019-2020 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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ddr_subsys: bus@5c000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x5c000000 0x0 0x5c000000 0x1000000>;
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ddr-pmu@5c020000 {
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compatible = "fsl,imx8-ddr-pmu";
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reg = <0x5c020000 0x10000>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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