dc5cb7a833
The SiFive errata code contains code checking applicable erratas
vs. actually applied erratas to suggest missing erratas to the
user when their Kconfig options are not enabled.
In the main kernel image one can be quite sure that all available
erratas appear at least once, so that check will succeed.
On the other hand modules can very well not use any errata-relevant
code, so the newly added module-alternative support may also patch
the module code, but not touch SiFive-specific erratas at all.
So to restore the original behaviour don't warn when patching
modules. This will keep the warning if necessary for the main kernel
image but prevent spurious warnings for modules.
Of course having such a vendor-specific warning may not be needed at
all, as CONFIG_ERRATA_SIFIVE is selected by CONFIG_SOC_SIFIVE and the
individual erratas are default-y so disabling them requires
deliberate action anyway. But for now just restore the old behaviour.
Fixes: a8e910168b ("riscv: implement module alternatives")
Reported-by: Ron Economos <re@w6rz.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Ron Economos <re@w6rz.net>
Link: https://lore.kernel.org/r/20220608120849.1695191-1-heiko@sntech.de
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
117 lines
3 KiB
C
117 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021 Sifive.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/bug.h>
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#include <asm/patch.h>
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#include <asm/alternative.h>
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#include <asm/vendorid_list.h>
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#include <asm/errata_list.h>
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struct errata_info_t {
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char name[ERRATA_STRING_LENGTH_MAX];
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bool (*check_func)(unsigned long arch_id, unsigned long impid);
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};
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static bool errata_cip_453_check_func(unsigned long arch_id, unsigned long impid)
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{
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/*
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* Affected cores:
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* Architecture ID: 0x8000000000000007
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* Implement ID: 0x20181004 <= impid <= 0x20191105
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*/
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if (arch_id != 0x8000000000000007 ||
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(impid < 0x20181004 || impid > 0x20191105))
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return false;
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return true;
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}
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static bool errata_cip_1200_check_func(unsigned long arch_id, unsigned long impid)
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{
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/*
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* Affected cores:
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* Architecture ID: 0x8000000000000007 or 0x1
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* Implement ID: mimpid[23:0] <= 0x200630 and mimpid != 0x01200626
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*/
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if (arch_id != 0x8000000000000007 && arch_id != 0x1)
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return false;
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if ((impid & 0xffffff) > 0x200630 || impid == 0x1200626)
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return false;
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return true;
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}
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static struct errata_info_t errata_list[ERRATA_SIFIVE_NUMBER] = {
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{
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.name = "cip-453",
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.check_func = errata_cip_453_check_func
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},
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{
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.name = "cip-1200",
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.check_func = errata_cip_1200_check_func
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},
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};
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static u32 __init_or_module sifive_errata_probe(unsigned long archid,
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unsigned long impid)
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{
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int idx;
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u32 cpu_req_errata = 0;
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for (idx = 0; idx < ERRATA_SIFIVE_NUMBER; idx++)
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if (errata_list[idx].check_func(archid, impid))
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cpu_req_errata |= (1U << idx);
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return cpu_req_errata;
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}
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static void __init_or_module warn_miss_errata(u32 miss_errata)
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{
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int i;
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pr_warn("----------------------------------------------------------------\n");
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pr_warn("WARNING: Missing the following errata may cause potential issues\n");
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for (i = 0; i < ERRATA_SIFIVE_NUMBER; i++)
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if (miss_errata & 0x1 << i)
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pr_warn("\tSiFive Errata[%d]:%s\n", i, errata_list[i].name);
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pr_warn("Please enable the corresponding Kconfig to apply them\n");
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pr_warn("----------------------------------------------------------------\n");
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}
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void __init_or_module sifive_errata_patch_func(struct alt_entry *begin,
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struct alt_entry *end,
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unsigned long archid,
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unsigned long impid,
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unsigned int stage)
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{
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struct alt_entry *alt;
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u32 cpu_req_errata;
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u32 cpu_apply_errata = 0;
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u32 tmp;
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if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
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return;
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cpu_req_errata = sifive_errata_probe(archid, impid);
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for (alt = begin; alt < end; alt++) {
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if (alt->vendor_id != SIFIVE_VENDOR_ID)
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continue;
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if (alt->errata_id >= ERRATA_SIFIVE_NUMBER) {
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WARN(1, "This errata id:%d is not in kernel errata list", alt->errata_id);
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continue;
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}
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tmp = (1U << alt->errata_id);
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if (cpu_req_errata & tmp) {
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patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
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cpu_apply_errata |= tmp;
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}
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}
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if (stage != RISCV_ALTERNATIVES_MODULE &&
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cpu_apply_errata != cpu_req_errata)
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warn_miss_errata(cpu_req_errata - cpu_apply_errata);
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}
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