9dc6ce8021
The current perf implementation in RISC-V is not very useful as it can not count any events other than cycle/instructions. Moreover, perf record can not be used or the events can not be started or stopped. Remove the implementation now for a better platform driver in future that will implement most of the missing functionality. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
13 lines
335 B
C
13 lines
335 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 SiFive
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* Copyright (C) 2018 Andes Technology Corporation
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*
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*/
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#ifndef _ASM_RISCV_PERF_EVENT_H
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#define _ASM_RISCV_PERF_EVENT_H
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#include <linux/perf_event.h>
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#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
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#endif /* _ASM_RISCV_PERF_EVENT_H */
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