72ca70acc7
Cross-subsystem Changes: - MEI subsystem pieces for XeHP SDV GSC support These are Acked-by Greg. Driver Changes: - Release mmaps on RPM suspend on discrete GPUs (Anshuman) - Update GuC version to 7.5 on DG1, DG2 and ADL - Revert "drm/i915/dg2: extend Wa_1409120013 to DG2" (Lucas) - MTL enabling incl. standalone media (Matt R, Lucas) - Explicitly clear BB_OFFSET for new contexts on Gen8+ (Chris) - Fix throttling / perf limit reason decoding (Ashutosh) - XeHP SDV GSC support (Vitaly, Alexander, Tomas) - Fix issues with overrding firmware file paths (John) - Invert if-else ladders to check latest version first (Lucas) - Cancel GuC engine busyness worker synchronously (Umesh) - Skip applying copy engine fuses outside PVC (Lucas) - Eliminate Gen10 frequency read function (Lucas) - Static code checker fixes (Gaosheng) - Selftest improvements (Chris) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YyQ4Jgl3cpGL1/As@jlahtine-mobl.ger.corp.intel.com
81 lines
1.8 KiB
C
81 lines
1.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include <linux/debugfs.h>
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#include <linux/string_helpers.h>
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#include <drm/drm_print.h>
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#include "gt/intel_gt_debugfs.h"
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#include "i915_drv.h"
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#include "intel_pxp.h"
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#include "intel_pxp_debugfs.h"
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#include "intel_pxp_irq.h"
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static int pxp_info_show(struct seq_file *m, void *data)
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{
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struct intel_pxp *pxp = m->private;
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struct drm_printer p = drm_seq_file_printer(m);
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bool enabled = intel_pxp_is_enabled(pxp);
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if (!enabled) {
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drm_printf(&p, "pxp disabled\n");
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return 0;
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}
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drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp)));
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drm_printf(&p, "instance counter: %u\n", pxp->key_instance);
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return 0;
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}
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DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(pxp_info);
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static int pxp_terminate_get(void *data, u64 *val)
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{
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/* nothing to read */
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return -EPERM;
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}
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static int pxp_terminate_set(void *data, u64 val)
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{
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struct intel_pxp *pxp = data;
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struct intel_gt *gt = pxp_to_gt(pxp);
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if (!intel_pxp_is_active(pxp))
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return -ENODEV;
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/* simulate a termination interrupt */
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spin_lock_irq(gt->irq_lock);
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intel_pxp_irq_handler(pxp, GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT);
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spin_unlock_irq(gt->irq_lock);
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if (!wait_for_completion_timeout(&pxp->termination,
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msecs_to_jiffies(100)))
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return -ETIMEDOUT;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(pxp_terminate_fops, pxp_terminate_get, pxp_terminate_set, "%llx\n");
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void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
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{
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static const struct intel_gt_debugfs_file files[] = {
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{ "info", &pxp_info_fops, NULL },
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{ "terminate_state", &pxp_terminate_fops, NULL },
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};
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struct dentry *root;
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if (!gt_root)
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return;
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if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
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return;
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root = debugfs_create_dir("pxp", gt_root);
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if (IS_ERR(root))
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return;
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intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), pxp);
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}
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