84a33d0fd9
Add the dpu_hw_wb abstraction to program registers related to the writeback block. These will be invoked once all the configuration is set and ready to be programmed to the registers. changes in v3: - start using the common struct dpu_hw_cdp_cfg - leave a comment about DPU non-DPU_WB_QOS_8LVL chipsets Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/483505/ Link: https://lore.kernel.org/r/1650984096-9964-7-git-send-email-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
115 lines
3 KiB
C
115 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved
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*/
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#ifndef _DPU_HW_WB_H
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#define _DPU_HW_WB_H
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#include "dpu_hw_catalog.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_top.h"
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#include "dpu_hw_util.h"
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#include "dpu_hw_pingpong.h"
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struct dpu_hw_wb;
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struct dpu_hw_wb_cfg {
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struct dpu_hw_fmt_layout dest;
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enum dpu_intf_mode intf_mode;
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struct drm_rect roi;
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struct drm_rect crop;
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};
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/**
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* enum CDP preload ahead address size
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*/
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enum {
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DPU_WB_CDP_PRELOAD_AHEAD_32,
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DPU_WB_CDP_PRELOAD_AHEAD_64
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};
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/**
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* struct dpu_hw_wb_qos_cfg : Writeback pipe QoS configuration
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* @danger_lut: LUT for generate danger level based on fill level
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* @safe_lut: LUT for generate safe level based on fill level
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* @creq_lut: LUT for generate creq level based on fill level
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* @danger_safe_en: enable danger safe generation
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*/
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struct dpu_hw_wb_qos_cfg {
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u32 danger_lut;
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u32 safe_lut;
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u64 creq_lut;
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bool danger_safe_en;
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};
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/**
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*
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* struct dpu_hw_wb_ops : Interface to the wb hw driver functions
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* Assumption is these functions will be called after clocks are enabled
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* @setup_outaddress: setup output address from the writeback job
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* @setup_outformat: setup output format of writeback block from writeback job
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* @setup_qos_lut: setup qos LUT for writeback block based on input
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* @setup_cdp: setup chroma down prefetch block for writeback block
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* @bind_pingpong_blk: enable/disable the connection with ping-pong block
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*/
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struct dpu_hw_wb_ops {
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void (*setup_outaddress)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_outformat)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_roi)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_cfg *wb);
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void (*setup_qos_lut)(struct dpu_hw_wb *ctx,
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struct dpu_hw_wb_qos_cfg *cfg);
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void (*setup_cdp)(struct dpu_hw_wb *ctx,
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struct dpu_hw_cdp_cfg *cfg);
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void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx,
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bool enable, const enum dpu_pingpong pp);
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};
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/**
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* struct dpu_hw_wb : WB driver object
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* @hw: block hardware details
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* @mdp: pointer to associated mdp portion of the catalog
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* @idx: hardware index number within type
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* @wb_hw_caps: hardware capabilities
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* @ops: function pointers
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* @hw_mdp: MDP top level hardware block
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*/
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struct dpu_hw_wb {
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struct dpu_hw_blk_reg_map hw;
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const struct dpu_mdp_cfg *mdp;
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/* wb path */
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int idx;
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const struct dpu_wb_cfg *caps;
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/* ops */
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struct dpu_hw_wb_ops ops;
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struct dpu_hw_mdp *hw_mdp;
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};
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/**
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* dpu_hw_wb_init(): Initializes and return writeback hw driver object.
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* @idx: wb_path index for which driver object is required
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* @addr: mapped register io address of MDP
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* @m : pointer to mdss catalog data
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*/
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struct dpu_hw_wb *dpu_hw_wb_init(enum dpu_wb idx,
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void __iomem *addr,
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const struct dpu_mdss_cfg *m);
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/**
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* dpu_hw_wb_destroy(): Destroy writeback hw driver object.
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* @hw_wb: Pointer to writeback hw driver object
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*/
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void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb);
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#endif /*_DPU_HW_WB_H */
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