8a64ef042e
A new warning in clang points out two places in this driver where
boolean expressions are being used with a bitwise OR instead of a
logical one:
drivers/net/ethernet/netronome/nfp/nfp_asm.c:199:20: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical]
reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
||
drivers/net/ethernet/netronome/nfp/nfp_asm.c:199:20: note: cast one or both operands to int to silence this warning
drivers/net/ethernet/netronome/nfp/nfp_asm.c:280:20: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical]
reg->src_lmextn = swreg_lmextn(lreg) | swreg_lmextn(rreg);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
||
drivers/net/ethernet/netronome/nfp/nfp_asm.c:280:20: note: cast one or both operands to int to silence this warning
2 errors generated.
The motivation for the warning is that logical operations short circuit
while bitwise operations do not. In this case, it does not seem like
short circuiting is harmful so implement the suggested fix of changing
to a logical operation to fix the warning.
Link: https://github.com/ClangBuiltLinux/linux/issues/1479
Reported-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20211018193101.2340261-1-nathan@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
320 lines
7.3 KiB
C
320 lines
7.3 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/* Copyright (C) 2016-2018 Netronome Systems, Inc. */
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include "nfp_asm.h"
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const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
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[CMD_TGT_WRITE8_SWAP] = { 0x02, 0x42 },
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[CMD_TGT_WRITE32_SWAP] = { 0x02, 0x5f },
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[CMD_TGT_READ8] = { 0x01, 0x43 },
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[CMD_TGT_READ32] = { 0x00, 0x5c },
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[CMD_TGT_READ32_LE] = { 0x01, 0x5c },
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[CMD_TGT_READ32_SWAP] = { 0x02, 0x5c },
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[CMD_TGT_READ_LE] = { 0x01, 0x40 },
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[CMD_TGT_READ_SWAP_LE] = { 0x03, 0x40 },
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[CMD_TGT_ADD] = { 0x00, 0x47 },
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[CMD_TGT_ADD_IMM] = { 0x02, 0x47 },
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};
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static bool unreg_is_imm(u16 reg)
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{
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return (reg & UR_REG_IMM) == UR_REG_IMM;
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}
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u16 br_get_offset(u64 instr)
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{
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u16 addr_lo, addr_hi;
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addr_lo = FIELD_GET(OP_BR_ADDR_LO, instr);
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addr_hi = FIELD_GET(OP_BR_ADDR_HI, instr);
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return (addr_hi * ((OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO)) + 1)) |
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addr_lo;
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}
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void br_set_offset(u64 *instr, u16 offset)
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{
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u16 addr_lo, addr_hi;
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addr_lo = offset & (OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO));
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addr_hi = offset != addr_lo;
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*instr &= ~(OP_BR_ADDR_HI | OP_BR_ADDR_LO);
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*instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi);
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*instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo);
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}
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void br_add_offset(u64 *instr, u16 offset)
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{
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u16 addr;
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addr = br_get_offset(*instr);
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br_set_offset(instr, addr + offset);
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}
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static bool immed_can_modify(u64 instr)
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{
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if (FIELD_GET(OP_IMMED_INV, instr) ||
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FIELD_GET(OP_IMMED_SHIFT, instr) ||
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FIELD_GET(OP_IMMED_WIDTH, instr) != IMMED_WIDTH_ALL) {
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pr_err("Can't decode/encode immed!\n");
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return false;
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}
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return true;
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}
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u16 immed_get_value(u64 instr)
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{
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u16 reg;
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if (!immed_can_modify(instr))
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return 0;
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reg = FIELD_GET(OP_IMMED_A_SRC, instr);
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if (!unreg_is_imm(reg))
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reg = FIELD_GET(OP_IMMED_B_SRC, instr);
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return (reg & 0xff) | FIELD_GET(OP_IMMED_IMM, instr) << 8;
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}
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void immed_set_value(u64 *instr, u16 immed)
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{
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if (!immed_can_modify(*instr))
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return;
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if (unreg_is_imm(FIELD_GET(OP_IMMED_A_SRC, *instr))) {
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*instr &= ~FIELD_PREP(OP_IMMED_A_SRC, 0xff);
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*instr |= FIELD_PREP(OP_IMMED_A_SRC, immed & 0xff);
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} else {
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*instr &= ~FIELD_PREP(OP_IMMED_B_SRC, 0xff);
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*instr |= FIELD_PREP(OP_IMMED_B_SRC, immed & 0xff);
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}
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*instr &= ~OP_IMMED_IMM;
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*instr |= FIELD_PREP(OP_IMMED_IMM, immed >> 8);
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}
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void immed_add_value(u64 *instr, u16 offset)
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{
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u16 val;
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if (!immed_can_modify(*instr))
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return;
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val = immed_get_value(*instr);
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immed_set_value(instr, val + offset);
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}
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static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
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{
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bool lm_id, lm_dec = false;
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_NNR:
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return UR_REG_NN | val;
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case NN_REG_XFER:
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return UR_REG_XFR | val;
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case NN_REG_LMEM:
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lm_id = swreg_lm_idx(reg);
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switch (swreg_lm_mode(reg)) {
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case NN_LM_MOD_NONE:
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if (val & ~UR_REG_LM_IDX_MAX) {
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pr_err("LM offset too large\n");
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return 0;
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}
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return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) |
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val;
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case NN_LM_MOD_DEC:
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lm_dec = true;
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fallthrough;
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case NN_LM_MOD_INC:
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if (val) {
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pr_err("LM offset in inc/dev mode\n");
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return 0;
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}
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return UR_REG_LM | UR_REG_LM_POST_MOD |
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FIELD_PREP(UR_REG_LM_IDX, lm_id) |
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FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec);
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default:
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pr_err("bad LM mode for unrestricted operands %d\n",
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swreg_lm_mode(reg));
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return 0;
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}
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case NN_REG_IMM:
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if (val & ~0xff) {
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pr_err("immediate too large\n");
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return 0;
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}
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return UR_REG_IMM_encode(val);
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case NN_REG_NONE:
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return is_dst ? UR_REG_NO_DST : REG_NONE;
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}
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pr_err("unrecognized reg encoding %08x\n", reg);
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return 0;
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}
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int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_ur_regs *reg)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_unreg(dst, true);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg) &&
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swreg_type(lreg) != NN_REG_NONE)
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_unreg(rreg, false);
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reg->breg = nfp_swreg_to_unreg(lreg, false);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_unreg(lreg, false);
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reg->breg = nfp_swreg_to_unreg(rreg, false);
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}
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reg->dst_lmextn = swreg_lmextn(dst);
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reg->src_lmextn = swreg_lmextn(lreg) || swreg_lmextn(rreg);
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return 0;
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}
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static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
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{
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u16 val = swreg_value(reg);
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bool lm_id;
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_XFER:
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return RE_REG_XFR | val;
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case NN_REG_LMEM:
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lm_id = swreg_lm_idx(reg);
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if (swreg_lm_mode(reg) != NN_LM_MOD_NONE) {
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pr_err("bad LM mode for restricted operands %d\n",
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swreg_lm_mode(reg));
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return 0;
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}
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if (val & ~RE_REG_LM_IDX_MAX) {
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pr_err("LM offset too large\n");
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return 0;
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}
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return RE_REG_LM | FIELD_PREP(RE_REG_LM_IDX, lm_id) | val;
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case NN_REG_IMM:
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if (val & ~(0x7f | has_imm8 << 7)) {
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pr_err("immediate too large\n");
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return 0;
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}
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*i8 = val & 0x80;
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return RE_REG_IMM_encode(val & 0x7f);
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case NN_REG_NONE:
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return is_dst ? RE_REG_NO_DST : REG_NONE;
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case NN_REG_NNR:
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pr_err("NNRs used with restricted encoding\n");
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return 0;
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}
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pr_err("unrecognized reg encoding\n");
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return 0;
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}
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int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_re_regs *reg, bool has_imm8)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg) &&
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swreg_type(lreg) != NN_REG_NONE)
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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}
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reg->dst_lmextn = swreg_lmextn(dst);
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reg->src_lmextn = swreg_lmextn(lreg) || swreg_lmextn(rreg);
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return 0;
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}
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#define NFP_USTORE_ECC_POLY_WORDS 7
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#define NFP_USTORE_OP_BITS 45
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static const u64 nfp_ustore_ecc_polynomials[NFP_USTORE_ECC_POLY_WORDS] = {
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0x0ff800007fffULL,
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0x11f801ff801fULL,
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0x1e387e0781e1ULL,
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0x17cb8e388e22ULL,
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0x1af5b2c93244ULL,
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0x1f56d5525488ULL,
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0x0daf69a46910ULL,
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};
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static bool parity(u64 value)
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{
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return hweight64(value) & 1;
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}
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int nfp_ustore_check_valid_no_ecc(u64 insn)
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{
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if (insn & ~GENMASK_ULL(NFP_USTORE_OP_BITS, 0))
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return -EINVAL;
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return 0;
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}
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u64 nfp_ustore_calc_ecc_insn(u64 insn)
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{
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u8 ecc = 0;
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int i;
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for (i = 0; i < NFP_USTORE_ECC_POLY_WORDS; i++)
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ecc |= parity(nfp_ustore_ecc_polynomials[i] & insn) << i;
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return insn | (u64)ecc << NFP_USTORE_OP_BITS;
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}
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