83e1ada67a
This patch enables presenting Sampled Instruction Address Register (SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended registers for the perf tool. Add these SPR's to sample_reg_mask in the tool side (to use with -I? option). Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Signed-off-by: Athira Jajeev <atrajeev@linux.vnet.ibm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nageswara R Sastry <rnsastry@linux.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: https://lore.kernel.org/r/20211018114948.16830-3-atrajeev@linux.vnet.ibm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
228 lines
6.1 KiB
C
228 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <errno.h>
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#include <string.h>
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#include <regex.h>
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#include <linux/zalloc.h>
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#include "../../../util/perf_regs.h"
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#include "../../../util/debug.h"
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#include "../../../util/event.h"
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#include "../../../util/header.h"
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#include "../../../perf-sys.h"
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#include "utils_header.h"
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#include <linux/kernel.h>
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#define PVR_POWER9 0x004E
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#define PVR_POWER10 0x0080
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const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(r0, PERF_REG_POWERPC_R0),
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SMPL_REG(r1, PERF_REG_POWERPC_R1),
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SMPL_REG(r2, PERF_REG_POWERPC_R2),
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SMPL_REG(r3, PERF_REG_POWERPC_R3),
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SMPL_REG(r4, PERF_REG_POWERPC_R4),
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SMPL_REG(r5, PERF_REG_POWERPC_R5),
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SMPL_REG(r6, PERF_REG_POWERPC_R6),
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SMPL_REG(r7, PERF_REG_POWERPC_R7),
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SMPL_REG(r8, PERF_REG_POWERPC_R8),
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SMPL_REG(r9, PERF_REG_POWERPC_R9),
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SMPL_REG(r10, PERF_REG_POWERPC_R10),
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SMPL_REG(r11, PERF_REG_POWERPC_R11),
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SMPL_REG(r12, PERF_REG_POWERPC_R12),
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SMPL_REG(r13, PERF_REG_POWERPC_R13),
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SMPL_REG(r14, PERF_REG_POWERPC_R14),
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SMPL_REG(r15, PERF_REG_POWERPC_R15),
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SMPL_REG(r16, PERF_REG_POWERPC_R16),
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SMPL_REG(r17, PERF_REG_POWERPC_R17),
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SMPL_REG(r18, PERF_REG_POWERPC_R18),
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SMPL_REG(r19, PERF_REG_POWERPC_R19),
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SMPL_REG(r20, PERF_REG_POWERPC_R20),
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SMPL_REG(r21, PERF_REG_POWERPC_R21),
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SMPL_REG(r22, PERF_REG_POWERPC_R22),
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SMPL_REG(r23, PERF_REG_POWERPC_R23),
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SMPL_REG(r24, PERF_REG_POWERPC_R24),
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SMPL_REG(r25, PERF_REG_POWERPC_R25),
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SMPL_REG(r26, PERF_REG_POWERPC_R26),
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SMPL_REG(r27, PERF_REG_POWERPC_R27),
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SMPL_REG(r28, PERF_REG_POWERPC_R28),
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SMPL_REG(r29, PERF_REG_POWERPC_R29),
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SMPL_REG(r30, PERF_REG_POWERPC_R30),
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SMPL_REG(r31, PERF_REG_POWERPC_R31),
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SMPL_REG(nip, PERF_REG_POWERPC_NIP),
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SMPL_REG(msr, PERF_REG_POWERPC_MSR),
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SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
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SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
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SMPL_REG(link, PERF_REG_POWERPC_LINK),
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SMPL_REG(xer, PERF_REG_POWERPC_XER),
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SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
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SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
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SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
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SMPL_REG(dar, PERF_REG_POWERPC_DAR),
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SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
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SMPL_REG(sier, PERF_REG_POWERPC_SIER),
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SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
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SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
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SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
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SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
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SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
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SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
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SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
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SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
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SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
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SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
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SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
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SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
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SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
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SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
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SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
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SMPL_REG_END
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};
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/* REG or %rREG */
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#define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
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/* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */
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#define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"
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static regex_t sdt_op_regex1, sdt_op_regex2;
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static int sdt_init_op_regex(void)
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{
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static int initialized;
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int ret = 0;
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if (initialized)
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return 0;
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ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
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if (ret)
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goto error;
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ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
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if (ret)
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goto free_regex1;
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initialized = 1;
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return 0;
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free_regex1:
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regfree(&sdt_op_regex1);
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error:
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pr_debug4("Regex compilation error.\n");
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return ret;
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}
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/*
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* Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).
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* Possible variants of OP are:
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* Format Example
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* -------------------------
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* NUM(REG) 48(18)
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* -NUM(REG) -48(18)
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* NUM(%rREG) 48(%r18)
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* -NUM(%rREG) -48(%r18)
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* REG 18
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* %rREG %r18
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* iNUM i0
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* i-NUM i-1
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*
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* SDT marker arguments on Powerpc uses %rREG form with -mregnames flag
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* and REG form with -mno-regnames. Here REG is general purpose register,
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* which is in 0 to 31 range.
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*/
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int arch_sdt_arg_parse_op(char *old_op, char **new_op)
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{
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int ret, new_len;
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regmatch_t rm[5];
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char prefix;
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/* Constant argument. Uprobe does not support it */
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if (old_op[0] == 'i') {
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pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
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return SDT_ARG_SKIP;
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}
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ret = sdt_init_op_regex();
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if (ret < 0)
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return ret;
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if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
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/* REG or %rREG --> %gprREG */
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new_len = 5; /* % g p r NULL */
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new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
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*new_op = zalloc(new_len);
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if (!*new_op)
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return -ENOMEM;
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scnprintf(*new_op, new_len, "%%gpr%.*s",
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(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);
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} else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
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/*
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* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->
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* +/-NUM(%gprREG)
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*/
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prefix = (rm[1].rm_so == -1) ? '+' : '-';
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new_len = 8; /* +/- ( % g p r ) NULL */
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new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
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new_len += (int)(rm[4].rm_eo - rm[4].rm_so);
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*new_op = zalloc(new_len);
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if (!*new_op)
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return -ENOMEM;
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scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,
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(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
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(int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);
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} else {
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pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
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return SDT_ARG_SKIP;
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}
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return SDT_ARG_VALID;
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}
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uint64_t arch__intr_reg_mask(void)
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{
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struct perf_event_attr attr = {
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.type = PERF_TYPE_HARDWARE,
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.config = PERF_COUNT_HW_CPU_CYCLES,
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.sample_type = PERF_SAMPLE_REGS_INTR,
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.precise_ip = 1,
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.disabled = 1,
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.exclude_kernel = 1,
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};
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int fd;
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u32 version;
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u64 extended_mask = 0, mask = PERF_REGS_MASK;
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/*
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* Get the PVR value to set the extended
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* mask specific to platform.
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*/
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version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
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if (version == PVR_POWER9)
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extended_mask = PERF_REG_PMU_MASK_300;
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else if (version == PVR_POWER10)
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extended_mask = PERF_REG_PMU_MASK_31;
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else
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return mask;
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attr.sample_regs_intr = extended_mask;
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attr.sample_period = 1;
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event_attr_init(&attr);
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/*
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* check if the pmu supports perf extended regs, before
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* returning the register mask to sample.
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*/
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fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
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if (fd != -1) {
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close(fd);
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mask |= extended_mask;
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}
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return mask;
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}
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