d45736b598
During high data transmission rates such as 16.0 GT/s, there is an increased risk of signal loss due to poor channel quality and interference. This can impact receiver's ability to capture signals accurately. Hence, as signal compensation is achieved through appropriate lane equalization, apply lane equalization settings at both transmitter and receiver which results in an increase in the PCIe signal strength. While at it, modify the pcie-tegra194 driver to make use of the common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h. Link: https://lore.kernel.org/linux-pci/20240911-pci-qcom-gen4-stability-v7-3-743f5c1fd027@linaro.org Tested-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com> [mani: dropped the code refactoring and minor changes] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
51 lines
2.1 KiB
Makefile
51 lines
2.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PCIE_DW) += pcie-designware.o
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obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o
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obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o
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obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
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obj-$(CONFIG_PCIE_BT1) += pcie-bt1.o
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obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
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obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
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obj-$(CONFIG_PCIE_FU740) += pcie-fu740.o
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obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
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obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
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obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o
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obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
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obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o
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obj-$(CONFIG_PCIE_QCOM_COMMON) += pcie-qcom-common.o
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obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
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obj-$(CONFIG_PCIE_QCOM_EP) += pcie-qcom-ep.o
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obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
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obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
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obj-$(CONFIG_PCIE_ROCKCHIP_DW) += pcie-dw-rockchip.o
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obj-$(CONFIG_PCIE_INTEL_GW) += pcie-intel-gw.o
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obj-$(CONFIG_PCIE_KEEMBAY) += pcie-keembay.o
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obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
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obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
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obj-$(CONFIG_PCI_MESON) += pci-meson.o
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obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o
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obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o
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obj-$(CONFIG_PCIE_UNIPHIER_EP) += pcie-uniphier-ep.o
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obj-$(CONFIG_PCIE_VISCONTI_HOST) += pcie-visconti.o
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obj-$(CONFIG_PCIE_RCAR_GEN4) += pcie-rcar-gen4.o
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# The following drivers are for devices that use the generic ACPI
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# pci_root.c driver but don't support standard ECAM config access.
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# They contain MCFG quirks to replace the generic ECAM accessors with
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# device-specific ones that are shared with the DT driver.
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# The ACPI driver is generic and should not require driver-specific
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# config options to be enabled, so we always build these drivers on
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# ARM64 and use internal ifdefs to only build the pieces we need
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# depending on whether ACPI, the DT driver, or both are enabled.
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obj-$(CONFIG_PCIE_AL) += pcie-al.o
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obj-$(CONFIG_PCI_HISI) += pcie-hisi.o
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ifdef CONFIG_ACPI
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ifdef CONFIG_PCI_QUIRKS
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obj-$(CONFIG_ARM64) += pcie-al.o
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obj-$(CONFIG_ARM64) += pcie-hisi.o
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obj-$(CONFIG_ARM64) += pcie-tegra194-acpi.o
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endif
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endif
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