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linux/drivers/gpu/drm/amd/display/dc/inc
Anthony Koo 5ed78cd69a drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP
[Why]
It is confusing to sinks if we send VSC SDP only on some format. Today we
signal colorimetry format using MSA while in formats like sRGB.
But when we switch to BT2020 we set the bit to ignore MSA  colorimetry and
instead use the colorimetry information in the VSC SDP.

But if sink supports signaling of colorimetry via VSC SDP we should always
set the MSA MISC1 bit 6, instead of doing so selectively.

[How]
If sink supports signaling of colorimetry via VSC SDP, and we are sending
the colorimetry info via VSC SDP with packet revision 05h, then always
set MSA MISC1 bit 6.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-13 15:29:43 -05:00
..
hw drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP 2019-11-13 15:29:43 -05:00
bw_fixed.h drm/amd/display: explicit uint64_t casting 2018-11-05 14:20:50 -05:00
clock_source.h drm/amd/display: Keep clocks high before seamless boot done 2019-03-19 15:04:03 -05:00
compressor.h drm/amd/display: fbc state could not reach while enable fbc 2018-11-30 12:02:35 -05:00
core_status.h drm/amd/display: add set and get clock for testing purposes 2019-07-18 14:27:25 -05:00
core_types.h drm/amd/display: remove unused code 2019-10-25 16:50:08 -04:00
custom_float.h drm/amd/display: Enable regamma 25 segments and use double buffer. 2017-09-26 17:14:18 -04:00
dc_link_ddc.h drm/amd/display: configurable aux timeout support 2019-10-17 16:24:56 -04:00
dc_link_dp.h drm/amd/display: configurable aux timeout support 2019-10-17 16:24:56 -04:00
dce_calcs.h drm/amdgpu/display: remove VEGAM config option 2018-05-18 16:08:18 -05:00
dcn_calcs.h drm/amd/display: make clk mgr soc specific 2019-05-31 10:39:29 -05:00
hw_sequencer.h drm/amd/display: Add renoir hw_seq 2019-10-17 16:27:34 -04:00
link_hwss.h drm/amd/display: Synchronous DisplayPort Link Training 2019-08-15 10:53:30 -05:00
reg_helper.h drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards 2019-11-13 15:29:42 -05:00
resource.h drm/amd/display: dce11.x /dce12 update formula input 2019-09-13 18:03:21 -05:00
vm_helper.h drm/amd/display: move vmid determination logic to a module 2019-06-22 09:34:14 -05:00