93032e31a5
Commit10b6ea0959("MIPS: Malta: Use syscon-reboot driver to reboot") converted the Malta board to use the generic syscon-reboot driver to handle reboots, but incorrectly used the value 0x4d rather than 0x42 as the magic to write to the reboot register. I also incorrectly believed that syscon/regmap would default to native endianness, but this isn't the case. Force this by specifying with a native-endian property in the devicetree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Fixes:10b6ea0959("MIPS: Malta: Use syscon-reboot driver to reboot") Reported-by: Guenter Roeck <linux@roeck-us.net> Cc: linux-mips@linux-mips.org Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Maciej W. Rozycki <macro@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/14396/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
111 lines
2.2 KiB
Text
111 lines
2.2 KiB
Text
/dts-v1/;
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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/memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
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/memreserve/ 0x00001000 0x000ef000; /* YAMON */
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/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,malta";
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cpu_intc: interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gic: interrupt-controller@1bdc0000 {
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compatible = "mti,gic";
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reg = <0x1bdc0000 0x20000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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/*
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* Declare the interrupt-parent even though the mti,gic
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* binding doesn't require it, such that the kernel can
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* figure out that cpu_intc is the root interrupt
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* controller & should be probed first.
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*/
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interrupt-parent = <&cpu_intc>;
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timer {
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compatible = "mti,gic-timer";
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interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
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};
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};
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i8259: interrupt-controller@20 {
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compatible = "intel,i8259";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
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};
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flash@1e000000 {
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compatible = "intel,dt28f160", "cfi-flash";
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reg = <0x1e000000 0x400000>;
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bank-width = <4>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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yamon@0 {
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label = "YAMON";
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reg = <0x0 0x100000>;
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read-only;
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};
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user-fs@100000 {
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label = "User FS";
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reg = <0x100000 0x2e0000>;
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};
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board-config@3e0000 {
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label = "Board Config";
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reg = <0x3e0000 0x20000>;
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read-only;
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};
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};
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};
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fpga_regs: system-controller@1f000000 {
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compatible = "mti,malta-fpga", "syscon", "simple-mfd";
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reg = <0x1f000000 0x1000>;
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native-endian;
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reboot {
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compatible = "syscon-reboot";
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regmap = <&fpga_regs>;
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offset = <0x500>;
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mask = <0x42>;
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};
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};
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isa {
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compatible = "isa";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0 0x1000>;
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rtc@70 {
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compatible = "motorola,mc146818";
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reg = <1 0x70 0x8>;
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interrupt-parent = <&i8259>;
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interrupts = <8>;
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};
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};
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};
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