niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity
linux/drivers/gpu/drm/amd/include
History
Lee Jones d7a9af7d4d drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 
Fixes the following W=1 kernel build warning(s):

In file included from drivers/gpu/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c:28:
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:151:29: warning: ‘UMC_BASE’ defined but not used [-Wunused-const-variable=]
151 | static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } },
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:81:29: warning: ‘FUSE_BASE’ defined but not used [-Wunused-const-variable=]
81 | static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } },
| ^~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:74:29: warning: ‘DPCS_BASE’ defined but not used [-Wunused-const-variable=]
74 | static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
| ^~~~~~~~~

NB: Snipped lots of these

Acked-by: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Tao Zhou <tao.zhou1@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Cc: Jiansong Chen <Jiansong.Chen@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-24 12:09:53 -05:00
..
asic_reg drm/amdgpu: Add and use seperate reg headers for dcn302 2020-11-10 14:15:08 -05:00
ivsrcid drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2) 2020-06-03 13:52:03 -04:00
amd_acpi.h drm/amd: Query and use ACPI backlight caps 2018-11-26 15:54:39 -05:00
amd_pcie.h drm/amdgpu: update amd_pcie.h to include gen4 speeds 2018-07-05 16:39:59 -05:00
amd_pcie_helpers.h gpu: drm: amd/radeon: Convert printk(KERN_<LEVEL> to pr_<level> 2017-03-29 23:53:24 -04:00
amd_shared.h drm/amdgpu: Add GFX Fine Grain Clock Gating flag 2020-11-04 17:08:08 -05:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atom-names.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atom-types.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atombios.h drm/amd/pm: correct VR shared rail info 2020-10-27 11:58:57 -04:00
atomfirmware.h drm/amd/display: Add internal display info 2020-11-24 12:08:15 -05:00
atomfirmwareid.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
cgs_common.h drm/amdgpu: retire indirect mmio reg support from cgs 2020-04-09 10:43:18 -04:00
cik_structs.h drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd 2019-05-24 12:21:01 -05:00
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h drm/amdgpu/discovery: reserve discovery data at the top of VRAM 2019-10-15 15:48:46 -04:00
displayobject.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
dm_pp_interface.h drm/amd/pp: Remove the same struct define in powerplay 2018-07-05 16:40:02 -05:00
kgd_kfd_interface.h drm next for 5.10-rc1 2020-10-15 10:46:16 -07:00
kgd_pp_interface.h drm/amdgpu: add amdgpu_gfx_state_change_set() set gfx power change entry (v2) 2020-11-13 17:29:45 -05:00
navi10_enum.h drm/amdgpu: add navi10 enums header 2019-06-20 15:54:46 -05:00
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h drm/amdgpu: add raven related define in pptable.h. 2017-05-24 17:41:50 -04:00
renoir_ip_offset.h drm/amd/display: Add DCN_BASE regs 2019-10-17 16:27:27 -04:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h drm/amdgpu: add navi10 ip offset header 2019-06-20 15:54:53 -05:00
soc15_ih_clientid.h drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid 2020-06-03 13:52:04 -04:00
v9_structs.h drm/amdkfd: Extend CU mask to 8 SEs (v3) 2019-08-02 10:19:11 -05:00
v10_structs.h drm/amdgpu: add v10 structs header (v2) 2019-06-20 21:16:37 -05:00
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h drm/amdgpu: Support new arcturus mtype 2019-09-13 17:35:48 -05:00
vega10_ip_offset.h drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused 2020-11-13 17:29:46 -05:00
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd 2019-05-24 12:21:01 -05:00