The current exception handler implementation, which assists when accessing user space memory, may exhibit random data corruption if the compiler decides to use a different register than the specified register %r29 (defined in ASM_EXCEPTIONTABLE_REG) for the error code. If the compiler choose another register, the fault handler will nevertheless store -EFAULT into %r29 and thus trash whatever this register is used for. Looking at the assembly I found that this happens sometimes in emulate_ldd(). To solve the issue, the easiest solution would be if it somehow is possible to tell the fault handler which register is used to hold the error code. Using %0 or %1 in the inline assembly is not posssible as it will show up as e.g. %r29 (with the "%r" prefix), which the GNU assembler can not convert to an integer. This patch takes another, better and more flexible approach: We extend the __ex_table (which is out of the execution path) by one 32-word. In this word we tell the compiler to insert the assembler instruction "or %r0,%r0,%reg", where %reg references the register which the compiler choosed for the error return code. In case of an access failure, the fault handler finds the __ex_table entry and can examine the opcode. The used register is encoded in the lowest 5 bits, and the fault handler can then store -EFAULT into this register. Since we extend the __ex_table to 3 words we can't use the BUILDTIME_TABLE_SORT config option any longer. Signed-off-by: Helge Deller <deller@gmx.de> Cc: <stable@vger.kernel.org> # v6.0+
73 lines
1.6 KiB
C
73 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __PARISC_SPECIAL_INSNS_H
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#define __PARISC_SPECIAL_INSNS_H
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#define lpa(va) ({ \
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unsigned long pa; \
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__asm__ __volatile__( \
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"copy %%r0,%0\n" \
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"8:\tlpa %%r0(%1),%0\n" \
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, \
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"or %%r0,%%r0,%%r0") \
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: "=&r" (pa) \
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: "r" (va) \
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: "memory" \
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); \
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pa; \
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})
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#define lpa_user(va) ({ \
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unsigned long pa; \
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__asm__ __volatile__( \
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"copy %%r0,%0\n" \
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"8:\tlpa %%r0(%%sr3,%1),%0\n" \
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"9:\n" \
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ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, \
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"or %%r0,%%r0,%%r0") \
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: "=&r" (pa) \
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: "r" (va) \
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: "memory" \
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); \
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pa; \
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})
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#define CR_EIEM 15 /* External Interrupt Enable Mask */
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#define CR_CR16 16 /* CR16 Interval Timer */
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#define CR_EIRR 23 /* External Interrupt Request Register */
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#define mfctl(reg) ({ \
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unsigned long cr; \
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__asm__ __volatile__( \
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"mfctl %1,%0" : \
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"=r" (cr) : "i" (reg) \
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); \
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cr; \
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})
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#define mtctl(gr, cr) \
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__asm__ __volatile__("mtctl %0,%1" \
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: /* no outputs */ \
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: "r" (gr), "i" (cr) : "memory")
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#define get_eiem() mfctl(CR_EIEM)
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#define set_eiem(val) mtctl(val, CR_EIEM)
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#define mfsp(reg) ({ \
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unsigned long cr; \
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__asm__ __volatile__( \
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"mfsp %%sr%1,%0" \
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: "=r" (cr) : "i"(reg) \
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); \
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cr; \
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})
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#define mtsp(val, cr) \
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{ if (__builtin_constant_p(val) && ((val) == 0)) \
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__asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
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else \
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__asm__ __volatile__("mtsp %0,%1" \
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: /* no outputs */ \
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: "r" (val), "i" (cr) : "memory"); }
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#endif /* __PARISC_SPECIAL_INSNS_H */
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