e2b67859ab
Add a mechanism that allows to inject a heartbeat error for testing purposes. A new attribute `inject_error` is added to debugfs for each QAT device. Upon a write on this attribute, the driver will inject an error on the device which can then be detected by the heartbeat feature. Errors are breaking the device functionality thus they require a device reset in order to be recovered. This functionality is not compiled by default, to enable it CRYPTO_DEV_QAT_ERROR_INJECTION must be set. Signed-off-by: Damian Muszynski <damian.muszynski@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Lucas Segarra Fernandez <lucas.segarra.fernandez@intel.com> Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Markas Rapoportas <markas.rapoportas@intel.com> Signed-off-by: Mun Chun Yep <mun.chun.yep@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
76 lines
2.1 KiB
C
76 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2023 Intel Corporation */
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#include <linux/random.h>
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#include "adf_admin.h"
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#include "adf_common_drv.h"
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#include "adf_heartbeat.h"
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#define MAX_HB_TICKS 0xFFFFFFFF
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static int adf_hb_set_timer_to_max(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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accel_dev->heartbeat->hb_timer = 0;
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if (hw_data->stop_timer)
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hw_data->stop_timer(accel_dev);
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return adf_send_admin_hb_timer(accel_dev, MAX_HB_TICKS);
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}
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static void adf_set_hb_counters_fail(struct adf_accel_dev *accel_dev, u32 ae,
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u32 thr)
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{
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struct hb_cnt_pair *stats = accel_dev->heartbeat->dma.virt_addr;
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struct adf_hw_device_data *hw_device = accel_dev->hw_device;
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const size_t max_aes = hw_device->get_num_aes(hw_device);
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const size_t hb_ctrs = hw_device->num_hb_ctrs;
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size_t thr_id = ae * hb_ctrs + thr;
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u16 num_rsp = stats[thr_id].resp_heartbeat_cnt;
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/*
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* Inject live.req != live.rsp and live.rsp == last.rsp
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* to trigger the heartbeat error detection
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*/
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stats[thr_id].req_heartbeat_cnt++;
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stats += (max_aes * hb_ctrs);
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stats[thr_id].resp_heartbeat_cnt = num_rsp;
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}
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int adf_heartbeat_inject_error(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_device = accel_dev->hw_device;
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const size_t max_aes = hw_device->get_num_aes(hw_device);
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const size_t hb_ctrs = hw_device->num_hb_ctrs;
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u32 rand, rand_ae, rand_thr;
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unsigned long ae_mask;
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int ret;
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ae_mask = hw_device->ae_mask;
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do {
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/* Ensure we have a valid ae */
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get_random_bytes(&rand, sizeof(rand));
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rand_ae = rand % max_aes;
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} while (!test_bit(rand_ae, &ae_mask));
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get_random_bytes(&rand, sizeof(rand));
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rand_thr = rand % hb_ctrs;
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/* Increase the heartbeat timer to prevent FW updating HB counters */
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ret = adf_hb_set_timer_to_max(accel_dev);
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if (ret)
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return ret;
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/* Configure worker threads to stop processing any packet */
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ret = adf_disable_arb_thd(accel_dev, rand_ae, rand_thr);
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if (ret)
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return ret;
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/* Change HB counters memory to simulate a hang */
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adf_set_hb_counters_fail(accel_dev, rand_ae, rand_thr);
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return 0;
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}
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