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linux/drivers/gpu/drm/amd/display/dc/dcn10
Roman Li 58e16c752e drm/amd/display: Enable power gating before init_pipes
[Why]
In init_hw() we call init_pipes() before enabling power gating.
init_pipes() tries to power gate dsc but it may fail because
required force-ons are not released yet.
As a result with dsc config the following errors observed on resume:
"REG_WAIT timeout 1us * 1000 tries - dcn20_dsc_pg_control"
"REG_WAIT timeout 1us * 1000 tries - dcn20_dpp_pg_control"
"REG_WAIT timeout 1us * 1000 tries - dcn20_hubp_pg_control"

[How]
Move enable_power_gating_plane() before init_pipes() in init_hw()

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-04-06 11:42:32 -04:00
..
dcn10_cm_common.c
dcn10_cm_common.h
dcn10_dpp.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn10_dpp.h drm/amd/display: Remove the repeated dpp1_full_bypass declaration 2021-06-18 17:14:36 -04:00
dcn10_dpp_cm.c
dcn10_dpp_dscl.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn10_dwb.c
dcn10_dwb.h
dcn10_hubbub.c drm/amd/display: Add pstate verification and recovery for DCN31 2022-03-15 14:33:57 -04:00
dcn10_hubbub.h drm/amd/display: remove compbuf size wait 2021-07-21 13:39:25 -04:00
dcn10_hubp.c drm/amd/display: Wait for hubp read line for Pollock 2022-03-15 14:41:55 -04:00
dcn10_hubp.h drm/amd/display: Wait for hubp read line for Pollock 2022-03-15 14:41:55 -04:00
dcn10_hw_sequencer.c drm/amd/display: Enable power gating before init_pipes 2022-04-06 11:42:32 -04:00
dcn10_hw_sequencer.h drm/amd/display: Refactor visual confirm 2021-06-08 12:18:37 -04:00
dcn10_hw_sequencer_debug.c drm/amd/display: fix type mismatch error for return variable 2021-02-09 15:48:28 -05:00
dcn10_hw_sequencer_debug.h
dcn10_init.c drm/amd/display: Added power down for DCN10 2021-12-30 08:54:44 -05:00
dcn10_init.h
dcn10_ipp.c
dcn10_ipp.h drm/amd/display: add cyan_skillfish display support 2021-10-04 15:22:57 -04:00
dcn10_link_encoder.c drm/amd/display: add set dp lane settings to link_hwss 2022-02-02 18:26:32 -05:00
dcn10_link_encoder.h drm/amd/display: add set dp lane settings to link_hwss 2022-02-02 18:26:32 -05:00
dcn10_mpc.c drm/amd/display: Refactor visual confirm 2021-06-08 12:18:37 -04:00
dcn10_mpc.h
dcn10_opp.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn10_opp.h
dcn10_optc.c drm/amd/display: fix function scopes 2021-12-13 16:34:26 -05:00
dcn10_optc.h drm/amd/display: log additional register state for debug 2021-07-21 13:39:25 -04:00
dcn10_resource.c drm/amd/display: Wait for hubp read line for Pollock 2022-03-15 14:41:55 -04:00
dcn10_resource.h drm/amd/display: move FPU code from dcn10 to dml/dcn10 folder 2022-03-15 14:25:16 -04:00
dcn10_stream_encoder.c drm/amd/display: revert "Reset fifo after enable otg" 2022-02-02 18:26:31 -05:00
dcn10_stream_encoder.h drm/amd/display: revert "Reset fifo after enable otg" 2022-02-02 18:26:31 -05:00
Makefile