niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity
linux/drivers/gpu/drm/amd/include
History
Aurabindo Pillai 262236b4f5 drm/amd/display: add missing reg defs for DCN3x HUBBUB 
[Why&How]
The omitted register definition caused call traces like:

[    3.811215] WARNING: CPU: 7 PID: 794 at drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:120 set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811406] Modules linked in: amdgpu(+) drm_ttm_helper ttm iommu_v2 gpu_sched drm_kms_helper cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt fb_sys_fops cfbcopyarea drm i2c_piix4 drm_panel_orientation_quirks
[    3.811419] CPU: 7 PID: 794 Comm: systemd-udevd Not tainted 5.16.0-kfd+ #132
[    3.811422] Hardware name: System manufacturer System Product Name/ROG STRIX B450-F GAMING, BIOS 3003 12/09/2019
[    3.811425] RIP: 0010:set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811615] Code: 08 49 89 51 08 8b 08 48 8d 42 08 49 89 41 08 44 8b 02 48 8d 50 08 0f b6 c9 49 89 51 08 8b 00 45 85 c0 75 b3 0f 0b eb af 5d c3 <0f> 0b e9 48 ff ff ff 49 8b 51 08 eb d0 49 8b 41 08 eb d5 66 0f 1f
[    3.811619] RSP: 0018:ffffb8c1c04cf640 EFLAGS: 00010246
[    3.811621] RAX: 0000000000000000 RBX: ffff96f2100d8800 RCX: 0000000000000000
[    3.811623] RDX: 0000000000000000 RSI: 0000000000000001 RDI: ffffb8c1c04cf650
[    3.811625] RBP: ffffb8c1c04cf640 R08: 000000000000047f R09: ffffb8c1c04cf658
[    3.811627] R10: ffff96f5161ff000 R11: ffff96f5161ff000 R12: ffff96f204afb9c0
[    3.811629] R13: 0000000000000000 R14: ffff96f202b94c00 R15: ffffb8c1c04cf718
[    3.811631] FS:  00007fe07c2e2880(0000) GS:ffff96f5059c0000(0000) knlGS:0000000000000000
[    3.811634] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    3.811636] CR2: 0000559634ab57b8 CR3: 0000000120674000 CR4: 00000000003506e0
[    3.811637] Call Trace:
[    3.811640]  <TASK>
[    3.811642]  generic_reg_update_ex+0x69/0x200 [amdgpu]
[    3.811831]  ? _printk+0x58/0x6f
[    3.811836]  dcn32_init_crb+0x18f/0x1b0 [amdgpu]
[    3.812031]  dcn32_init_hw+0x379/0x6a0 [amdgpu]
[    3.812223]  dc_hardware_init+0xba/0x100 [amdgpu]
[    3.812415]  amdgpu_dm_init.isra.0.cold+0x166/0x1867 [amdgpu]
[    3.812616]  ? dev_vprintk_emit+0x139/0x15d
[    3.812621]  ? dev_printk_emit+0x4e/0x65
[    3.812624]  dm_hw_init+0x12/0x30 [amdgpu]
[    3.812820]  amdgpu_device_init.cold+0x130d/0x178c [amdgpu]
[    3.813017]  ? pci_read_config_word+0x25/0x40
[    3.813021]  amdgpu_driver_load_kms+0x1a/0x130 [amdgpu]
[    3.813178]  amdgpu_pci_probe+0x130/0x330 [amdgpu]

Fixes: 4f29f9cf09 ("drm/amd: add register headers for DCN32/321")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-06-21 18:17:22 -04:00
..
asic_reg drm/amd/display: add missing reg defs for DCN3x HUBBUB 2022-06-21 18:17:22 -04:00
ivsrcid drm/amdgpu/vcn: Add vcn ras poison consumption event handling 2022-05-10 17:53:13 -04:00
aldebaran_ip_offset.h drm/amd/include/aldebaran_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-05-21 10:32:16 -04:00
amd_acpi.h drm/amdgpu: support atcs method powershift (v4) 2021-06-01 22:36:48 -04:00
amd_pcie.h drm/amdgpu:Add pcie gen5 support in pcie capability. 2021-01-21 09:54:56 -05:00
amd_pcie_helpers.h gpu: drm: amd/radeon: Convert printk(KERN_<LEVEL> to pr_<level> 2017-03-29 23:53:24 -04:00
amd_shared.h drm/amdgpu: enable more GFX clockgating features for GC 11.0.0 2022-05-05 16:50:58 -04:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h drm/amdgpu: fix typo 2022-04-26 11:53:03 -04:00
atomfirmware.h drm/amd: Add atomfirmware.h definitions needed for DCN32/321 2022-06-03 16:43:36 -04:00
atomfirmwareid.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
beige_goby_ip_offset.h drm/amd/amdgpu: initialize IP offset for beige_goby 2021-05-19 22:40:09 -04:00
cgs_common.h drm/amdgpu: retire indirect mmio reg support from cgs 2020-04-09 10:43:18 -04:00
cik_structs.h drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd 2019-05-24 12:21:01 -05:00
cyan_skillfish_ip_offset.h drm/amd: Mark IP_BASE definition as __maybe_unused 2021-12-13 16:32:34 -05:00
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h drm/amdgpu: update latest IP discovery table structures 2022-04-28 17:46:31 -04:00
displayobject.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
dm_pp_interface.h drm/amd/pp: Remove the same struct define in powerplay 2018-07-05 16:40:02 -05:00
kgd_kfd_interface.h drm/amdkfd: Add KFD support for soc21 v3 2022-05-04 10:43:54 -04:00
kgd_pp_interface.h drm/amd/pm: enable workload type change on smu_v13_0_7 2022-05-06 10:36:12 -04:00
mes_api_def.h drm/amd: Fix spelling typo in comments 2022-06-03 16:43:36 -04:00
mes_v11_api_def.h drm/amdgpu/mes11: update mes11 api interface 2022-06-03 16:43:38 -04:00
navi10_enum.h drm/amdgpu: Update NV SIMD-per-CU to 2 2021-07-01 00:05:18 -04:00
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h drm/amdgpu: add raven related define in pptable.h. 2017-05-24 17:41:50 -04:00
renoir_ip_offset.h drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h drm/amdgpu: add lsdma block 2022-05-10 17:53:11 -04:00
soc15_ih_clientid.h drm/amdgpu: add soc21 ih clientid definition 2022-05-04 09:52:59 -04:00
soc21_enum.h drm/amdgpu: add soc21 chip enum header v8 2022-05-04 10:02:18 -04:00
v9_structs.h drm/amdkfd: Extend CU mask to 8 SEs (v3) 2019-08-02 10:19:11 -05:00
v10_structs.h drm/amdgpu: add v10 structs header (v2) 2019-06-20 21:16:37 -05:00
v11_structs.h drm/amdgpu: add gfx11 mqd structures 2022-05-04 10:02:27 -04:00
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h drm/amdgpu: Support new arcturus mtype 2019-09-13 17:35:48 -05:00
vega10_ip_offset.h drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused 2020-11-13 17:29:46 -05:00
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h drm/amdkfd: Check HIQ's MQD for queue preemption status 2021-03-23 22:59:25 -04:00
yellow_carp_offset.h drm/amd: Mark IP_BASE definition as __maybe_unused 2021-12-13 16:32:34 -05:00