968b803324
- Add initial support to recognise the HeXin C2000 processor.
- Add papr-vpd and papr-sysparm character device drivers for VPD & sysparm
retrieval, so userspace tools can be adapted to avoid doing raw firmware
calls from userspace.
- Sched domains optimisations for shared processor partitions on P9/P10.
- A series of optimisations for KVM running as a nested HV under PowerVM.
- Other small features and fixes.
Thanks to: Aditya Gupta, Aneesh Kumar K.V, Arnd Bergmann, Christophe Leroy,
Colin Ian King, Dario Binacchi, David Heidelberg, Geoff Levand, Gustavo A.
R. Silva, Haoran Liu, Jordan Niethe, Kajol Jain, Kevin Hao, Kunwu Chan, Li
kunyu, Li zeming, Masahiro Yamada, Michal Suchánek, Nathan Lynch, Naveen N Rao,
Nicholas Piggin, Randy Dunlap, Sathvika Vasireddy, Srikar Dronamraju, Stephen
Rothwell, Vaibhav Jain, Zhao Ke.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmWRVf0THG1wZUBlbGxl
cm1hbi5pZC5hdQAKCRBR6+o8yOGlgIfpEACns86LkKuH1wTxbXJFaY2vIdPbBVUO
oh0+y6Bm6ybCVvSp/CcyDPRRWpVlnp4BZlAh4x3gHrdRYEbIaFhI3gUzUtPLxAmf
Oza1qyN570AFOudTNOy3VErtHiMHSuI7ckRshXWCakbAN8VlBDFWje3VJ4vZZ5OB
Ii4RM0a3e/XqUZodLQXvDcqo3GDeIVmf1BnOTvEFFPhjZUZBfJarL6OHuyX7Xp1J
oGSBA3O7UBVGrQsoGS5UAMRqZQnvLc5hn150FU1qDPkHu5X5iLvIMUakTFCYgGYw
mT7DBPpDWKKFSfVjsjIVX2GPv8XSMPnZDmxOl/SIKM1F4aKAL9vmbYP6AMXXmvVB
SpluSmkcp+YujtK5QO8BN4I2SD3xIbhH8yjMUh2CAFP1SBR0QnKpXUGHRiZ0m7fM
SSFAHHLEzKJC46vUsazazoldyWQMAwBHKQzoASHf59yrEP4uta/+pimHdsOeU2UP
IAQEYzw7fTKbEIvqV4qf6sW+5bVUhISS1vSlJ3OEkGqUxVvaUMQ2ePPbX+rfv7lS
hXlxh9vjFzcDK5PYmLi0Agua9ct0ER0MOdY5kRMXAb4+AlVLQi4EgymxRCrjYu2/
XodDf1xJU2w7gdMc4TpiouHRrOtZQ9JWH5j+x0YnN4lG2vmG7lbU22a4myn6PjP9
RLAymXt4/1iHqA==
=LjlQ
-----END PGP SIGNATURE-----
Merge tag 'powerpc-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
- Add initial support to recognise the HeXin C2000 processor.
- Add papr-vpd and papr-sysparm character device drivers for VPD &
sysparm retrieval, so userspace tools can be adapted to avoid doing
raw firmware calls from userspace.
- Sched domains optimisations for shared processor partitions on
P9/P10.
- A series of optimisations for KVM running as a nested HV under
PowerVM.
- Other small features and fixes.
Thanks to Aditya Gupta, Aneesh Kumar K.V, Arnd Bergmann, Christophe
Leroy, Colin Ian King, Dario Binacchi, David Heidelberg, Geoff Levand,
Gustavo A. R. Silva, Haoran Liu, Jordan Niethe, Kajol Jain, Kevin Hao,
Kunwu Chan, Li kunyu, Li zeming, Masahiro Yamada, Michal Suchánek,
Nathan Lynch, Naveen N Rao, Nicholas Piggin, Randy Dunlap, Sathvika
Vasireddy, Srikar Dronamraju, Stephen Rothwell, Vaibhav Jain, and
Zhao Ke.
* tag 'powerpc-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (96 commits)
powerpc/ps3_defconfig: Disable PPC64_BIG_ENDIAN_ELF_ABI_V2
powerpc/86xx: Drop unused CONFIG_MPC8610
powerpc/powernv: Add error handling to opal_prd_range_is_valid
selftests/powerpc: Fix spelling mistake "EACCESS" -> "EACCES"
powerpc/hvcall: Reorder Nestedv2 hcall opcodes
powerpc/ps3: Add missing set_freezable() for ps3_probe_thread()
powerpc/mpc83xx: Use wait_event_freezable() for freezable kthread
powerpc/mpc83xx: Add the missing set_freezable() for agent_thread_fn()
powerpc/fsl: Fix fsl,tmu-calibration to match the schema
powerpc/smp: Dynamically build Powerpc topology
powerpc/smp: Avoid asym packing within thread_group of a core
powerpc/smp: Add __ro_after_init attribute
powerpc/smp: Disable MC domain for shared processor
powerpc/smp: Enable Asym packing for cores on shared processor
powerpc/sched: Cleanup vcpu_is_preempted()
powerpc: add cpu_spec.cpu_features to vmcoreinfo
powerpc/imc-pmu: Add a null pointer check in update_events_in_group()
powerpc/powernv: Add a null pointer check in opal_powercap_init()
powerpc/powernv: Add a null pointer check in opal_event_init()
powerpc/powernv: Add a null pointer check to scom_debug_init_one()
...
321 lines
6.9 KiB
ArmAsm
321 lines
6.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Split from ftrace_64.S
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*/
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#include <linux/export.h>
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#include <linux/magic.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/ftrace.h>
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#include <asm/ppc-opcode.h>
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#include <asm/thread_info.h>
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#include <asm/bug.h>
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#include <asm/ptrace.h>
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/*
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*
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* ftrace_caller()/ftrace_regs_caller() is the function that replaces _mcount()
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* when ftrace is active.
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*
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* We arrive here after a function A calls function B, and we are the trace
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* function for B. When we enter r1 points to A's stack frame, B has not yet
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* had a chance to allocate one yet.
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*
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* Additionally r2 may point either to the TOC for A, or B, depending on
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* whether B did a TOC setup sequence before calling us.
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*
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* On entry the LR points back to the _mcount() call site, and r0 holds the
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* saved LR as it was on entry to B, ie. the original return address at the
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* call site in A.
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*
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* Our job is to save the register state into a struct pt_regs (on the stack)
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* and then arrange for the ftrace function to be called.
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*/
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.macro ftrace_regs_entry allregs
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/* Create a minimal stack frame for representing B */
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PPC_STLU r1, -STACK_FRAME_MIN_SIZE(r1)
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/* Create our stack frame + pt_regs */
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PPC_STLU r1,-SWITCH_FRAME_SIZE(r1)
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/* Save all gprs to pt_regs */
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SAVE_GPR(0, r1)
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SAVE_GPRS(3, 10, r1)
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#ifdef CONFIG_PPC64
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/* Save the original return address in A's stack frame */
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std r0, LRSAVE+SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE(r1)
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/* Ok to continue? */
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lbz r3, PACA_FTRACE_ENABLED(r13)
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cmpdi r3, 0
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beq ftrace_no_trace
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#endif
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.if \allregs == 1
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SAVE_GPR(2, r1)
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SAVE_GPRS(11, 31, r1)
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.else
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#ifdef CONFIG_LIVEPATCH_64
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SAVE_GPR(14, r1)
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#endif
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.endif
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/* Save previous stack pointer (r1) */
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addi r8, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
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PPC_STL r8, GPR1(r1)
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.if \allregs == 1
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/* Load special regs for save below */
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mfmsr r8
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mfctr r9
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mfxer r10
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mfcr r11
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.else
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/* Clear MSR to flag as ftrace_caller versus frace_regs_caller */
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li r8, 0
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.endif
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/* Get the _mcount() call site out of LR */
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mflr r7
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/* Save it as pt_regs->nip */
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PPC_STL r7, _NIP(r1)
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/* Also save it in B's stackframe header for proper unwind */
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PPC_STL r7, LRSAVE+SWITCH_FRAME_SIZE(r1)
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/* Save the read LR in pt_regs->link */
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PPC_STL r0, _LINK(r1)
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#ifdef CONFIG_PPC64
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/* Save callee's TOC in the ABI compliant location */
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std r2, STK_GOT(r1)
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LOAD_PACA_TOC() /* get kernel TOC in r2 */
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LOAD_REG_ADDR(r3, function_trace_op)
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ld r5,0(r3)
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#else
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lis r3,function_trace_op@ha
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lwz r5,function_trace_op@l(r3)
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#endif
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#ifdef CONFIG_LIVEPATCH_64
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mr r14, r7 /* remember old NIP */
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#endif
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/* Calculate ip from nip-4 into r3 for call below */
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subi r3, r7, MCOUNT_INSN_SIZE
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/* Put the original return address in r4 as parent_ip */
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mr r4, r0
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/* Save special regs */
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PPC_STL r8, _MSR(r1)
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.if \allregs == 1
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PPC_STL r9, _CTR(r1)
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PPC_STL r10, _XER(r1)
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PPC_STL r11, _CCR(r1)
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.endif
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/* Load &pt_regs in r6 for call below */
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addi r6, r1, STACK_INT_FRAME_REGS
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.endm
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.macro ftrace_regs_exit allregs
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/* Load ctr with the possibly modified NIP */
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PPC_LL r3, _NIP(r1)
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mtctr r3
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#ifdef CONFIG_LIVEPATCH_64
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cmpd r14, r3 /* has NIP been altered? */
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#endif
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/* Restore gprs */
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.if \allregs == 1
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REST_GPRS(2, 31, r1)
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.else
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REST_GPRS(3, 10, r1)
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#ifdef CONFIG_LIVEPATCH_64
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REST_GPR(14, r1)
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#endif
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.endif
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/* Restore possibly modified LR */
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PPC_LL r0, _LINK(r1)
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mtlr r0
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#ifdef CONFIG_PPC64
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/* Restore callee's TOC */
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ld r2, STK_GOT(r1)
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#endif
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/* Pop our stack frame */
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addi r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
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#ifdef CONFIG_LIVEPATCH_64
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/* Based on the cmpd above, if the NIP was altered handle livepatch */
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bne- livepatch_handler
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#endif
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bctr /* jump after _mcount site */
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.endm
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_GLOBAL(ftrace_regs_caller)
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ftrace_regs_entry 1
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/* ftrace_call(r3, r4, r5, r6) */
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.globl ftrace_regs_call
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ftrace_regs_call:
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bl ftrace_stub
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ftrace_regs_exit 1
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_GLOBAL(ftrace_caller)
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ftrace_regs_entry 0
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/* ftrace_call(r3, r4, r5, r6) */
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.globl ftrace_call
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ftrace_call:
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bl ftrace_stub
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ftrace_regs_exit 0
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_GLOBAL(ftrace_stub)
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blr
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#ifdef CONFIG_PPC64
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ftrace_no_trace:
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mflr r3
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mtctr r3
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REST_GPR(3, r1)
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addi r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
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mtlr r0
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bctr
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#endif
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#ifdef CONFIG_LIVEPATCH_64
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/*
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* This function runs in the mcount context, between two functions. As
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* such it can only clobber registers which are volatile and used in
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* function linkage.
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*
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* We get here when a function A, calls another function B, but B has
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* been live patched with a new function C.
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*
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* On entry:
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* - we have no stack frame and can not allocate one
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* - LR points back to the original caller (in A)
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* - CTR holds the new NIP in C
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* - r0, r11 & r12 are free
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*/
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livepatch_handler:
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ld r12, PACA_THREAD_INFO(r13)
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/* Allocate 3 x 8 bytes */
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ld r11, TI_livepatch_sp(r12)
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addi r11, r11, 24
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std r11, TI_livepatch_sp(r12)
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/* Save toc & real LR on livepatch stack */
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std r2, -24(r11)
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mflr r12
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std r12, -16(r11)
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/* Store stack end marker */
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lis r12, STACK_END_MAGIC@h
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ori r12, r12, STACK_END_MAGIC@l
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std r12, -8(r11)
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/* Put ctr in r12 for global entry and branch there */
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mfctr r12
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bctrl
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/*
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* Now we are returning from the patched function to the original
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* caller A. We are free to use r11, r12 and we can use r2 until we
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* restore it.
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*/
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ld r12, PACA_THREAD_INFO(r13)
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ld r11, TI_livepatch_sp(r12)
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/* Check stack marker hasn't been trashed */
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lis r2, STACK_END_MAGIC@h
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ori r2, r2, STACK_END_MAGIC@l
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ld r12, -8(r11)
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1: tdne r12, r2
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EMIT_BUG_ENTRY 1b, __FILE__, __LINE__ - 1, 0
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/* Restore LR & toc from livepatch stack */
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ld r12, -16(r11)
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mtlr r12
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ld r2, -24(r11)
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/* Pop livepatch stack frame */
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ld r12, PACA_THREAD_INFO(r13)
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subi r11, r11, 24
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std r11, TI_livepatch_sp(r12)
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/* Return to original caller of live patched function */
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blr
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#endif /* CONFIG_LIVEPATCH */
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#ifndef CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY
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_GLOBAL(mcount)
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_GLOBAL(_mcount)
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EXPORT_SYMBOL(_mcount)
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mflr r12
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mtctr r12
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mtlr r0
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bctr
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#endif
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#ifdef CONFIG_FUNCTION_GRAPH_TRACER
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_GLOBAL(return_to_handler)
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/* need to save return values */
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#ifdef CONFIG_PPC64
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std r4, -32(r1)
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std r3, -24(r1)
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/* save TOC */
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std r2, -16(r1)
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std r31, -8(r1)
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mr r31, r1
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stdu r1, -112(r1)
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/*
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* We might be called from a module.
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* Switch to our TOC to run inside the core kernel.
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*/
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LOAD_PACA_TOC()
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#else
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stwu r1, -16(r1)
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stw r3, 8(r1)
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stw r4, 12(r1)
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#endif
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bl ftrace_return_to_handler
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nop
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/* return value has real return address */
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mtlr r3
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#ifdef CONFIG_PPC64
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ld r1, 0(r1)
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ld r4, -32(r1)
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ld r3, -24(r1)
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ld r2, -16(r1)
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ld r31, -8(r1)
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#else
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lwz r3, 8(r1)
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lwz r4, 12(r1)
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addi r1, r1, 16
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#endif
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/* Jump back to real return address */
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blr
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#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
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.pushsection ".tramp.ftrace.text","aw",@progbits;
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.globl ftrace_tramp_text
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ftrace_tramp_text:
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.space 32
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.popsection
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.pushsection ".tramp.ftrace.init","aw",@progbits;
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.globl ftrace_tramp_init
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ftrace_tramp_init:
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.space 32
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.popsection
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