cf5ab01c87
In general users, don't have the necessary information to determine whether late loading of a new microcode version is safe and does not modify anything which the currently running kernel uses already, e.g. removal of CPUID bits or behavioural changes of MSRs. To address this issue, Intel has added a "minimum required version" field to a previously reserved field in the microcode header. Microcode updates should only be applied if the current microcode version is equal to, or greater than this minimum required version. Thomas made some suggestions on how meta-data in the microcode file could provide Linux with information to decide if the new microcode is suitable candidate for late loading. But even the "simpler" option requires a lot of metadata and corresponding kernel code to parse it, so the final suggestion was to add the 'minimum required version' field in the header. When microcode changes visible features, microcode will set the minimum required version to its own revision which prevents late loading. Old microcode blobs have the minimum revision field always set to 0, which indicates that there is no information and the kernel considers it unsafe. This is a pure OS software mechanism. The hardware/firmware ignores this header field. For early loading there is no restriction because OS visible features are enumerated after the early load and therefore a change has no effect. The check is always enabled, but by default not enforced. It can be enforced via Kconfig or kernel command line. If enforced, the kernel refuses to late load microcode with a minimum required version field which is zero or when the currently loaded microcode revision is smaller than the minimum required revision. If not enforced the load happens independent of the revision check to stay compatible with the existing behaviour, but it influences the decision whether the kernel is tainted or not. If the check signals that the late load is safe, then the kernel is not tainted. Early loading is not affected by this. [ tglx: Massaged changelog and fixed up the implementation ] Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20231002115903.776467264@linutronix.de
89 lines
2.1 KiB
C
89 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MICROCODE_H
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#define _ASM_X86_MICROCODE_H
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struct cpu_signature {
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unsigned int sig;
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unsigned int pf;
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unsigned int rev;
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};
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struct ucode_cpu_info {
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struct cpu_signature cpu_sig;
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void *mc;
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};
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#ifdef CONFIG_MICROCODE
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void load_ucode_bsp(void);
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void load_ucode_ap(void);
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void microcode_bsp_resume(void);
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#else
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static inline void load_ucode_bsp(void) { }
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static inline void load_ucode_ap(void) { }
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static inline void microcode_bsp_resume(void) { }
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#endif
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extern unsigned long initrd_start_early;
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#ifdef CONFIG_CPU_SUP_INTEL
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/* Intel specific microcode defines. Public for IFS */
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struct microcode_header_intel {
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unsigned int hdrver;
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unsigned int rev;
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unsigned int date;
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unsigned int sig;
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unsigned int cksum;
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unsigned int ldrver;
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unsigned int pf;
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unsigned int datasize;
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unsigned int totalsize;
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unsigned int metasize;
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unsigned int min_req_ver;
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unsigned int reserved;
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};
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struct microcode_intel {
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struct microcode_header_intel hdr;
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unsigned int bits[];
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};
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#define DEFAULT_UCODE_DATASIZE (2000)
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#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
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#define MC_HEADER_TYPE_MICROCODE 1
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#define MC_HEADER_TYPE_IFS 2
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static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
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{
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return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
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}
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static inline u32 intel_get_microcode_revision(void)
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{
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u32 rev, dummy;
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native_wrmsrl(MSR_IA32_UCODE_REV, 0);
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/* As documented in the SDM: Do a CPUID 1 here */
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native_cpuid_eax(1);
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/* get the current revision from MSR 0x8B */
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native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
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return rev;
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}
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#endif /* !CONFIG_CPU_SUP_INTEL */
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bool microcode_nmi_handler(void);
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void microcode_offline_nmi_handler(void);
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#ifdef CONFIG_MICROCODE_LATE_LOADING
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DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable);
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static __always_inline bool microcode_nmi_handler_enabled(void)
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{
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return static_branch_unlikely(µcode_nmi_handler_enable);
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}
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#else
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static __always_inline bool microcode_nmi_handler_enabled(void) { return false; }
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#endif
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#endif /* _ASM_X86_MICROCODE_H */
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