d66d24ac30
If we have a per CE (Copy Engine) IRQ then we have no summary register. Right now the code generates a summary register by iterating over all copy engines and seeing if they have an interrupt pending. This has a problem. Specifically if _none_ if the Copy Engines have an interrupt pending then they might go into low power mode and reading from their address space will cause a full system crash. This was seen to happen when two interrupts went off at nearly the same time. Both were handled by a single call of ath10k_snoc_napi_poll() but, because there were two interrupts handled and thus two calls to napi_schedule() there was still a second call to ath10k_snoc_napi_poll() which ran with no interrupts pending. Instead of iterating over all the copy engines, let's just keep track of the IRQs that fire. Then we can effectively generate our own summary without ever needing to read the Copy Engines. Tested-on: WCN3990 SNOC WLAN.HL.3.2.2-00490-QCAHLSWMTPL-1 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rakesh Pillai <pillair@codeaurora.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200709082024.v2.1.I4d2f85ffa06f38532631e864a3125691ef5ffe06@changeid
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (c) 2018 The Linux Foundation. All rights reserved.
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*/
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#ifndef _SNOC_H_
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#define _SNOC_H_
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#include "hw.h"
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#include "ce.h"
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#include "qmi.h"
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struct ath10k_snoc_drv_priv {
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enum ath10k_hw_rev hw_rev;
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u64 dma_mask;
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u32 msa_size;
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};
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struct snoc_state {
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u32 pipe_cfg_addr;
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u32 svc_to_pipe_map;
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};
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struct ath10k_snoc_pipe {
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struct ath10k_ce_pipe *ce_hdl;
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u8 pipe_num;
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struct ath10k *hif_ce_state;
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size_t buf_sz;
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/* protect ce info */
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spinlock_t pipe_lock;
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struct ath10k_snoc *ar_snoc;
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};
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struct ath10k_snoc_target_info {
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u32 target_version;
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u32 target_type;
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u32 target_revision;
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u32 soc_version;
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};
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struct ath10k_snoc_ce_irq {
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u32 irq_line;
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};
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enum ath10k_snoc_flags {
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ATH10K_SNOC_FLAG_REGISTERED,
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ATH10K_SNOC_FLAG_UNREGISTERING,
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ATH10K_SNOC_FLAG_RECOVERY,
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ATH10K_SNOC_FLAG_8BIT_HOST_CAP_QUIRK,
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};
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struct clk_bulk_data;
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struct regulator_bulk_data;
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struct ath10k_snoc {
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struct platform_device *dev;
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struct ath10k *ar;
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unsigned int use_tz;
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struct ath10k_firmware {
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struct device *dev;
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dma_addr_t fw_start_addr;
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struct iommu_domain *iommu_domain;
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size_t mapped_mem_size;
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} fw;
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void __iomem *mem;
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dma_addr_t mem_pa;
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struct ath10k_snoc_target_info target_info;
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size_t mem_len;
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struct ath10k_snoc_pipe pipe_info[CE_COUNT_MAX];
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struct ath10k_snoc_ce_irq ce_irqs[CE_COUNT_MAX];
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struct ath10k_ce ce;
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struct timer_list rx_post_retry;
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struct regulator_bulk_data *vregs;
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size_t num_vregs;
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struct clk_bulk_data *clks;
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size_t num_clks;
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struct ath10k_qmi *qmi;
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unsigned long flags;
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bool xo_cal_supported;
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u32 xo_cal_data;
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DECLARE_BITMAP(pending_ce_irqs, CE_COUNT_MAX);
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};
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static inline struct ath10k_snoc *ath10k_snoc_priv(struct ath10k *ar)
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{
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return (struct ath10k_snoc *)ar->drv_priv;
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}
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int ath10k_snoc_fw_indication(struct ath10k *ar, u64 type);
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void ath10k_snoc_fw_crashed_dump(struct ath10k *ar);
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#endif /* _SNOC_H_ */
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