7b3fd8109b
1. Add nodes for the two SPI controllers found in MIPS Creator CI20.
2. Reparent SPI clock source to effectively use MPLL and set its clock
rate to 54MHz.
NOTE: To use the SPI controllers, `pinctrl-0` property must be set in
order to configure the used pins. As SPI functionality is multiplexed on
multiple pin groups, this choice is left to the user.
An example configuration:
```
&spi0 {
pinctrl-0 = <&pins_spi0>;
}
pins_spi0: spi0 {
function = "ssi0";
groups = "ssi0-dt-e", "ssi0-dr-e", "ssi0-clk-e",
"ssi0-ce0-e", "ssi0-ce1-e";
bias-disable;
};
```
Consult the CI20 pinout description for more details.
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Link: https://lore.kernel.org/r/20210830230139.21476-4-contact@artur-rojek.eu
Signed-off-by: Mark Brown <broonie@kernel.org>
541 lines
10 KiB
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541 lines
10 KiB
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include "jz4780.dtsi"
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#include <dt-bindings/clock/ingenic,tcu.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/regulator/active-semi,8865-regulator.h>
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/ {
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compatible = "img,ci20", "ingenic,jz4780";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial3 = &uart3;
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serial4 = &uart4;
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};
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chosen {
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stdout-path = &uart4;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x10000000
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0x30000000 0x30000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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sw1 {
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label = "ci20:sw1";
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linux,code = <KEY_F13>;
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gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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label = "ci20:red:led0";
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gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "none";
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};
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led1 {
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label = "ci20:red:led1";
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gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "nand-disk";
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};
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led2 {
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label = "ci20:red:led2";
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gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu1";
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};
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led3 {
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label = "ci20:red:led3";
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gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu0";
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};
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};
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eth0_power: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "eth0_power";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
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enable-active-high;
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};
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ir: ir {
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compatible = "gpio-ir-receiver";
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gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
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};
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wlan0_power: fixedregulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "wlan0_power";
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gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
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enable-active-high;
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};
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otg_power: fixedregulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "otg_power";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
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enable-active-high;
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};
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};
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&ext {
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clock-frequency = <48000000>;
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};
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&cgu {
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/*
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* Use the 32.768 kHz oscillator as the parent of the RTC for a higher
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* precision.
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*/
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assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
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<&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>;
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assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
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<&cgu JZ4780_CLK_MPLL>,
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<&cgu JZ4780_CLK_SSIPLL>;
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assigned-clock-rates = <48000000>, <0>, <54000000>;
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};
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&tcu {
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/*
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* 750 kHz for the system timers and clocksource,
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* use channel #0 and #1 for the per cpu system timers,
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* and use channel #2 for the clocksource.
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*
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* 3000 kHz for the OST timer to provide a higher
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* precision clocksource.
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*/
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assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
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<&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
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assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
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};
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&mmc0 {
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_mmc0>;
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cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
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};
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&mmc1 {
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_mmc1>;
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brcmf: wifi@1 {
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/* reg = <4>;*/
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compatible = "brcm,bcm4330-fmac";
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vcc-supply = <&wlan0_power>;
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device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
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};
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};
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&uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_uart0>;
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_uart1>;
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};
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&uart2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_uart2>;
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uart-has-rtscts;
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bluetooth {
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compatible = "brcm,bcm4330-bt";
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reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
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vcc-supply = <&wlan0_power>;
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device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
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};
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_uart3>;
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_uart4>;
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c0>;
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clock-frequency = <400000>;
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act8600: act8600@5a {
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compatible = "active-semi,act8600";
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reg = <0x5a>;
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status = "okay";
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regulators {
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vddcore: SUDCDC1 {
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regulator-name = "DCDC_REG1";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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};
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vddmem: SUDCDC2 {
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regulator-name = "DCDC_REG2";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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vcc_33: SUDCDC3 {
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regulator-name = "DCDC_REG3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vcc_50: SUDCDC4 {
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regulator-name = "SUDCDC_REG4";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vcc_25: LDO_REG5 {
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regulator-name = "LDO_REG5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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wifi_io: LDO_REG6 {
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regulator-name = "LDO_REG6";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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vcc_28: LDO_REG7 {
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regulator-name = "LDO_REG7";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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vcc_15: LDO_REG8 {
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regulator-name = "LDO_REG8";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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vrtc_18: LDO_REG9 {
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regulator-name = "LDO_REG9";
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/* Despite the datasheet stating 3.3V
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* for REG9 and the driver expecting that,
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* REG9 outputs 1.8V.
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* Likely the CI20 uses a proprietary
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* factory programmed chip variant.
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* Since this is a simple on/off LDO the
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* exact values do not matter.
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*/
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vcc_11: LDO_REG10 {
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regulator-name = "LDO_REG10";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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};
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};
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};
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&i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c1>;
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};
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&i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c2>;
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};
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&i2c3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c3>;
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c4>;
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clock-frequency = <400000>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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interrupt-parent = <&gpf>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&nemc {
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status = "okay";
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nandc: nand-controller@1 {
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compatible = "ingenic,jz4780-nand";
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reg = <1 0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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ingenic,bch-controller = <&bch>;
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ingenic,nemc-tAS = <10>;
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ingenic,nemc-tAH = <5>;
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ingenic,nemc-tBP = <10>;
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ingenic,nemc-tAW = <15>;
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ingenic,nemc-tSTRV = <100>;
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/*
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* Only CLE/ALE are needed for the devices that are connected, rather
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* than the full address line set.
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc>;
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nand@1 {
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reg = <1>;
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc_cs1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <2>;
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#size-cells = <2>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x0 0x0 0x800000>;
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};
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partition@800000 {
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label = "u-boot";
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reg = <0x0 0x800000 0x0 0x200000>;
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};
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partition@a00000 {
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label = "u-boot-env";
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reg = <0x0 0xa00000 0x0 0x200000>;
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};
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partition@c00000 {
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label = "boot";
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reg = <0x0 0xc00000 0x0 0x4000000>;
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};
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partition@4c00000 {
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label = "system";
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reg = <0x0 0x4c00000 0x1 0xfb400000>;
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};
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};
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};
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};
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dm9000@6 {
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compatible = "davicom,dm9000";
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davicom,no-eeprom;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc_cs6>;
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reg = <6 0 1 /* addr */
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6 2 1>; /* data */
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ingenic,nemc-tAS = <15>;
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ingenic,nemc-tAH = <10>;
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ingenic,nemc-tBP = <20>;
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ingenic,nemc-tAW = <50>;
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ingenic,nemc-tSTRV = <100>;
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reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
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vcc-supply = <ð0_power>;
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interrupt-parent = <&gpe>;
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interrupts = <19 4>;
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nvmem-cells = <ð0_addr>;
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nvmem-cell-names = "mac-address";
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};
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};
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&bch {
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status = "okay";
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};
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&otg_phy {
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status = "okay";
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vcc-supply = <&otg_power>;
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};
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&otg {
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status = "okay";
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};
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&pinctrl {
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pins_uart0: uart0 {
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function = "uart0";
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groups = "uart0-data";
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bias-disable;
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};
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pins_uart1: uart1 {
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function = "uart1";
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groups = "uart1-data";
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bias-disable;
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};
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pins_uart2: uart2 {
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function = "uart2";
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groups = "uart2-data", "uart2-hwflow";
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bias-disable;
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};
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pins_uart3: uart3 {
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function = "uart3";
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groups = "uart3-data", "uart3-hwflow";
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bias-disable;
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};
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pins_uart4: uart4 {
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function = "uart4";
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groups = "uart4-data";
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bias-disable;
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};
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pins_i2c0: i2c0 {
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function = "i2c0";
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groups = "i2c0-data";
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bias-disable;
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};
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pins_i2c1: i2c1 {
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function = "i2c1";
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groups = "i2c1-data";
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bias-disable;
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};
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pins_i2c2: i2c2 {
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function = "i2c2";
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groups = "i2c2-data";
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bias-disable;
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};
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pins_i2c3: i2c3 {
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function = "i2c3";
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groups = "i2c3-data";
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bias-disable;
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};
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pins_i2c4: i2c4 {
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function = "i2c4";
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groups = "i2c4-data-e";
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bias-disable;
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};
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pins_nemc: nemc {
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function = "nemc";
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groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
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bias-disable;
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};
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pins_nemc_cs1: nemc-cs1 {
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function = "nemc-cs1";
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groups = "nemc-cs1";
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bias-disable;
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};
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pins_nemc_cs6: nemc-cs6 {
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function = "nemc-cs6";
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groups = "nemc-cs6";
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bias-disable;
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};
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pins_mmc0: mmc0 {
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function = "mmc0";
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groups = "mmc0-1bit-e", "mmc0-4bit-e";
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bias-disable;
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};
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pins_mmc1: mmc1 {
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function = "mmc1";
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groups = "mmc1-1bit-d", "mmc1-4bit-d";
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bias-disable;
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};
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};
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