Bindu Ramamurthy f891ae71f3 drm/amd/display: Populate socclk entries for dcn3.02/3.03 ... [Why] Initialize socclk entries in bandwidth params for dcn302, dcn303. [How] Fetch the sockclk values from smu for the DPM levels and for the DPM levels where smu returns 0, previous level values are reported. Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-07-23 10:07:58 -04:00
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dalsmc.h	drm/amdgpu/display: add MALL support (v2)	2020-10-23 15:33:48 -04:00
dcn30_clk_mgr.c	drm/amd/display: Populate socclk entries for dcn3.02/3.03	2021-07-23 10:07:58 -04:00
dcn30_clk_mgr.h	drm/amd/display: Add DCN3 CLK_MGR	2020-07-01 01:59:14 -04:00
dcn30_clk_mgr_smu_msg.c	drm/amdgpu/display: add MALL support (v2)	2020-10-23 15:33:48 -04:00
dcn30_clk_mgr_smu_msg.h	drm/amdgpu/display: add MALL support (v2)	2020-10-23 15:33:48 -04:00