Michael Strauss 1e5588d140 drm/amd/display: Fallback to clocks which meet requested voltage on DCN31 ... [WHY] On certain configs, SMU clock table voltages don't match which cause parser to behave incorrectly by leaving dcfclk and socclk table entries unpopulated. [HOW] Currently the function that finds the corresponding clock for a given voltage only checks for exact voltage level matches. In the case that no match gets found, parser now falls back to searching for the max clock which meets the requested voltage (i.e. its corresponding voltage is below requested). Signed-off-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-10-28 14:26:50 -04:00
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dcn31_clk_mgr.c	drm/amd/display: Fallback to clocks which meet requested voltage on DCN31	2021-10-28 14:26:50 -04:00
dcn31_clk_mgr.h	drm/amd/display: Query VCO frequency from register for DCN3.1	2021-07-23 10:07:58 -04:00
dcn31_smu.c	drm/amd/display: update header file name	2021-07-08 17:47:28 -04:00
dcn31_smu.h	drm/amd/display: Add DCN3.1 clock manager support	2021-06-04 16:03:26 -04:00