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linux/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
Ahmad Othman ffd89aa968 drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1
[Why]
Created new fields that matches new B0 structs On DCN31 the mapping of
DIO output to PHY differs from A0 to B0 boards with new PHY C20 & this
new mapping needed to be handled.

[How]
Mapped new structure based on new structs Added logic for mapping over
A0 and B0 boards Hooked all new structs together.

Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Ahmad Othman <Ahmad.Othman@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-10-28 14:26:14 -04:00

58 lines
1.7 KiB
C

/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef DM_CP_PSP_IF__H
#define DM_CP_PSP_IF__H
struct dc_link;
struct cp_psp_stream_config {
uint8_t otg_inst;
uint8_t dig_be;
uint8_t dig_fe;
uint8_t link_enc_idx;
uint8_t stream_enc_idx;
uint8_t phy_idx;
uint8_t dio_output_idx;
uint8_t dio_output_type;
uint8_t assr_enabled;
uint8_t mst_enabled;
uint8_t dp2_enabled;
void *dm_stream_ctx;
bool dpms_off;
};
struct cp_psp_funcs {
bool (*enable_assr)(void *handle, struct dc_link *link);
void (*update_stream_config)(void *handle, struct cp_psp_stream_config *config);
};
struct cp_psp {
void *handle;
struct cp_psp_funcs funcs;
};
#endif /* DM_CP_PSP_IF__H */