Qingqing Zhuo ee37341199 drm/amd/display: Re-arrange FPU code structure for dcn2x ... [Why] Current FPU code for DCN2x is located under dml/dcn2x. This is not aligned with DC's general source tree structure. [How] Move FPU code for DCN2x to dml/dcn20. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-10-06 15:49:24 -04:00
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dcn20_fpu.c	drm/amd/display: Re-arrange FPU code structure for dcn2x	2021-10-06 15:49:24 -04:00
dcn20_fpu.h	drm/amd/display: Re-arrange FPU code structure for dcn2x	2021-10-06 15:49:24 -04:00
display_mode_vba_20.c	drm/amd/display: DETBufferSizeInKbyte variable type modifications	2021-05-10 18:10:34 -04:00
display_mode_vba_20.h	drm/amd/display: Add DCN2 changes to DML	2019-06-21 18:59:34 -05:00
display_mode_vba_20v2.c	drm/amd/display: cleanup idents after a revert	2021-08-31 14:19:20 -04:00
display_mode_vba_20v2.h	drm/amd/display: support "dummy pstate"	2019-07-18 14:27:26 -05:00
display_rq_dlg_calc_20.c	drm/amd/display: Fix rest of pass-by-value structs in DML	2021-09-23 15:17:30 -04:00
display_rq_dlg_calc_20.h	drm/amd/display: Pass display_pipe_params_st as const in DML	2021-09-23 15:17:29 -04:00
display_rq_dlg_calc_20v2.c	drm/amd/display: Fix rest of pass-by-value structs in DML	2021-09-23 15:17:30 -04:00
display_rq_dlg_calc_20v2.h	drm/amd/display: Pass display_pipe_params_st as const in DML	2021-09-23 15:17:29 -04:00