-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmTvfQgUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vyDKA//UBxniXTyxvN8L/agMZngFJd9jLkE p2lnk5eTW6y/aJp1g+ujc7IJEmHG/B1Flp0b5mK8XL7S6OBtAGlPwnuPPpXb0ZxV ofSuQpYoNZGpkYrQMYvATfdLnH2WF3Yj3WCqh5jd2EldPEyqhMV68l7NMzf6+td2 KWJPli1XO8e60JAzbhpXH9vn1I0T8e6Qx8z/ulcydfiOH3PGDPnVrEo8gw9CvJOr aDqSPW7uhTk2SjjUJcAlQVpTGclE4yBxOOhEbuSGc7L6Ab04Y6D0XKx1589AUK6Z W2dQFK3cFYNQQ9aS/2DMUG88H09ca5t8kgUf7Iz3uan1soPzSYK8SLNBgxAPs11S 1jY093rDXXoaCJqxWUwDc/JUpWq6T3g4m445SNvFIOMcSwmMOIfAwfug4UexE1zC Ie8u3Um35Mp25o0o6V1J2EjdBsUsm0p//CsslfoAAIWi85W02Z/46bLLcITchkCe bP05H+c55ZN6maRJiaeghcpY+iWO4XCRCKS9mF1v9yn7FOhNxhBcwgTNPyGBVrYz T9w3ynTHAmuwNqtd6jhpTR/b1902up/Qv9I8uHhBDMqJAXfHocGEXHZblNuZMgfE bu9cjcbFghUPdrhUHYmbEqAzhdlL2SFuMYfn8D4QV4A6x+32xCdwsi39I0Effm5V wl0HmemjKjTYbLw= =iFFM -----END PGP SIGNATURE----- Merge tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Add locking to read/modify/write PCIe Capability Register accessors for Link Control and Root Control - Use pci_dev_id() when possible instead of manually composing ID from dev->bus->number and dev->devfn Resource management: - Move prototypes for __weak sysfs resource files to linux/pci.h to fix 'no previous prototype' warnings - Make more I/O port accesses depend on HAS_IOPORT - Use devm_platform_get_and_ioremap_resource() instead of open-coding platform_get_resource() followed by devm_ioremap_resource() Power management: - Ensure devices are powered up while accessing VPD - If device is powered-up, keep it that way while polling for PME - Only read PCI_PM_CTRL register when available, to avoid reading the wrong register and corrupting dev->current_state Virtualization: - Avoid Secondary Bus Reset on NVIDIA T4 GPUs Error handling: - Remove unused pci_disable_pcie_error_reporting() - Unexport pci_enable_pcie_error_reporting(), used only by aer.c - Unexport pcie_port_bus_type, used only by PCI core VGA: - Simplify and clean up typos in VGA arbiter Apple PCIe controller driver: - Initialize pcie->nvecs (number of available MSIs) before use Broadcom iProc PCIe controller driver: - Use of_property_read_bool() instead of low-level accessors for boolean properties Broadcom STB PCIe controller driver: - Assert PERST# when probing BCM2711 because some bootloaders don't do it Freescale i.MX6 PCIe controller driver: - Add .host_deinit() callback so we can clean up things like regulators on probe failure or driver unload Freescale Layerscape PCIe controller driver: - Add support for link-down notification so the endpoint driver can process LINK_DOWN events - Add suspend/resume support, including manual PME_Turn_off/PME_TO_Ack handshake - Save Link Capabilities during probe so they can be restored when handling a link-up event, since the controller loses the Link Width and Link Speed values during reset Intel VMD host bridge driver: - Fix disable of bridge windows during domain reset; previously we cleared the base/limit registers, which actually left the windows enabled Marvell MVEBU PCIe controller driver: - Remove unused busn member Microchip PolarFlare PCIe controller driver: - Fix interrupt bit definitions so the SEC and DED interrupt handlers work correctly - Make driver buildable as a module - Read FPGA MSI configuration parameters from hardware instead of hard-coding them Microsoft Hyper-V host bridge driver: - To avoid a NULL pointer dereference, skip MSI restore after hibernate if MSI/MSI-X hasn't been enabled NVIDIA Tegra194 PCIe controller driver: - Revert 'PCI: tegra194: Enable support for 256 Byte payload' because Linux doesn't know how to reduce MPS from to 256 to 128 bytes for endpoints below a switch (because other devices below the switch might already be operating), which leads to 'Malformed TLP' errors Qualcomm PCIe controller driver: - Add DT and driver support for interconnect bandwidth voting for 'pcie-mem' and 'cpu-pcie' interconnects - Fix broken SDX65 'compatible' DT property - Configure controller so MHI bus master clock will be switched off while in ASPM L1.x states - Use alignment restriction from EPF core in EPF MHI driver - Add Endpoint eDMA support - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driver - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup latency - Add sa8775p DT binding and driver support Rockchip PCIe controller driver: - Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper 32 bits SiFive FU740 PCIe controller driver: - Set the supported number of MSI vectors so we can use all available MSI interrupts Synopsys DesignWare PCIe controller driver: - Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and dw_pcie_resume_noirq()) to be called by controller driver suspend/resume ops, and a controller callback to send PME_Turn_Off MicroSemi Switchtec management driver: - Add support for PCIe Gen5 devices Miscellaneous: - Reorder and compress to reduce size of struct pci_dev - Fix race in DOE destroy_work_on_stack() - Add stubs to avoid casts between incompatible function types - Explicitly include correct DT includes to untangle headers" * tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (96 commits) PCI: qcom-ep: Add ICC bandwidth voting support dt-bindings: PCI: qcom: ep: Add interconnects path PCI: qcom-ep: Treat unknown IRQ events as an error dt-bindings: PCI: qcom: Fix SDX65 compatible PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API PCI: epf-mhi: Use iATU for small transfers PCI: epf-mhi: Add support for SM8450 PCI: epf-mhi: Add eDMA support PCI: qcom-ep: Add eDMA support PCI: epf-mhi: Make use of the alignment restriction from EPF core PCI/PM: Only read PCI_PM_CTRL register when available PCI: qcom: Add support for sa8775p SoC dt-bindings: PCI: qcom: Add sa8775p compatible PCI: qcom-ep: Pass alignment restriction to the EPF core PCI: Simplify pcie_capability_clear_and_set_word() control flow PCI: Tidy config space save/restore messages PCI: Fix code formatting inconsistencies PCI: Fix typos in docs and comments PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos PCI: Simplify pci_dev_driver() ...
348 lines
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348 lines
10 KiB
Text
# SPDX-License-Identifier: GPL-2.0
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menu "PCI controller drivers"
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depends on PCI
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config PCI_AARDVARK
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tristate "Aardvark PCIe controller"
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depends on (ARCH_MVEBU && ARM64) || COMPILE_TEST
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depends on OF
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depends on PCI_MSI
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select PCI_BRIDGE_EMUL
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help
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Add support for Aardvark 64bit PCIe Host Controller. This
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controller is part of the South Bridge of the Marvel Armada
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3700 SoC.
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config PCIE_ALTERA
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tristate "Altera PCIe controller"
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depends on ARM || NIOS2 || ARM64 || COMPILE_TEST
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help
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Say Y here if you want to enable PCIe controller support on Altera
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FPGA.
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config PCIE_ALTERA_MSI
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tristate "Altera PCIe MSI feature"
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depends on PCIE_ALTERA
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depends on PCI_MSI
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help
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Say Y here if you want PCIe MSI support for the Altera FPGA.
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This MSI driver supports Altera MSI to GIC controller IP.
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config PCIE_APPLE_MSI_DOORBELL_ADDR
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hex
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default 0xfffff000
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depends on PCIE_APPLE
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config PCIE_APPLE
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tristate "Apple PCIe controller"
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depends on ARCH_APPLE || COMPILE_TEST
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depends on OF
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depends on PCI_MSI
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select PCI_HOST_COMMON
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help
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Say Y here if you want to enable PCIe controller support on Apple
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system-on-chips, like the Apple M1. This is required for the USB
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type-A ports, Ethernet, Wi-Fi, and Bluetooth.
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If unsure, say Y if you have an Apple Silicon system.
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config PCI_VERSATILE
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bool "ARM Versatile PB PCI controller"
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depends on ARCH_VERSATILE || COMPILE_TEST
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config PCIE_BRCMSTB
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tristate "Broadcom Brcmstb PCIe controller"
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depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCMBCA || \
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BMIPS_GENERIC || COMPILE_TEST
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depends on OF
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depends on PCI_MSI
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default ARCH_BRCMSTB || BMIPS_GENERIC
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help
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Say Y here to enable PCIe host controller support for
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Broadcom STB based SoCs, like the Raspberry Pi 4.
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config PCIE_IPROC
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tristate
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help
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This enables the iProc PCIe core controller support for Broadcom's
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iProc family of SoCs. An appropriate bus interface driver needs
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to be enabled to select this.
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config PCIE_IPROC_PLATFORM
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tristate "Broadcom iProc PCIe platform bus driver"
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depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
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depends on OF
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select PCIE_IPROC
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default ARCH_BCM_IPROC
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help
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Say Y here if you want to use the Broadcom iProc PCIe controller
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through the generic platform bus interface
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config PCIE_IPROC_BCMA
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tristate "Broadcom iProc BCMA PCIe controller"
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depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST)
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select PCIE_IPROC
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select BCMA
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default ARCH_BCM_5301X
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help
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Say Y here if you want to use the Broadcom iProc PCIe controller
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through the BCMA bus interface
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config PCIE_IPROC_MSI
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bool "Broadcom iProc PCIe MSI support"
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depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA
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depends on PCI_MSI
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default ARCH_BCM_IPROC
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help
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Say Y here if you want to enable MSI support for Broadcom's iProc
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PCIe controller
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config PCI_HOST_THUNDER_PEM
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bool "Cavium Thunder PCIe controller to off-chip devices"
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depends on ARM64 || COMPILE_TEST
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depends on OF || (ACPI && PCI_QUIRKS)
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select PCI_HOST_COMMON
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help
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Say Y here if you want PCIe support for CN88XX Cavium Thunder SoCs.
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config PCI_HOST_THUNDER_ECAM
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bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon"
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depends on ARM64 || COMPILE_TEST
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depends on OF || (ACPI && PCI_QUIRKS)
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select PCI_HOST_COMMON
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help
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Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
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config PCI_FTPCI100
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bool "Faraday Technology FTPCI100 PCI controller"
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depends on OF
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default ARCH_GEMINI
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config PCI_HOST_COMMON
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tristate
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select PCI_ECAM
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config PCI_HOST_GENERIC
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tristate "Generic PCI host controller"
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depends on OF
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select PCI_HOST_COMMON
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select IRQ_DOMAIN
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help
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Say Y here if you want to support a simple generic PCI host
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controller, such as the one emulated by kvmtool.
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config PCIE_HISI_ERR
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depends on ACPI_APEI_GHES && (ARM64 || COMPILE_TEST)
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bool "HiSilicon HIP PCIe controller error handling driver"
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help
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Say Y here if you want error handling support
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for the PCIe controller's errors on HiSilicon HIP SoCs
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config PCI_IXP4XX
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bool "Intel IXP4xx PCI controller"
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depends on ARM && OF
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depends on ARCH_IXP4XX || COMPILE_TEST
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default ARCH_IXP4XX
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help
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Say Y here if you want support for the PCI host controller found
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in the Intel IXP4xx XScale-based network processor SoC.
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config VMD
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depends on PCI_MSI && X86_64 && !UML
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tristate "Intel Volume Management Device Driver"
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help
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Adds support for the Intel Volume Management Device (VMD). VMD is a
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secondary PCI host bridge that allows PCI Express root ports,
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and devices attached to them, to be removed from the default
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PCI domain and placed within the VMD domain. This provides
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more bus resources than are otherwise possible with a
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single domain. If you know your system provides one of these and
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has devices attached to it, say Y; if you are not sure, say N.
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To compile this driver as a module, choose M here: the
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module will be called vmd.
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config PCI_LOONGSON
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bool "LOONGSON PCIe controller"
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depends on MACH_LOONGSON64 || COMPILE_TEST
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depends on OF || ACPI
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depends on PCI_QUIRKS
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default MACH_LOONGSON64
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help
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Say Y here if you want to enable PCI controller support on
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Loongson systems.
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config PCI_MVEBU
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tristate "Marvell EBU PCIe controller"
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depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST
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depends on MVEBU_MBUS
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depends on ARM
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depends on OF
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select PCI_BRIDGE_EMUL
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help
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Add support for Marvell EBU PCIe controller. This PCIe controller
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is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370,
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Armada XP, Armada 375, Armada 38x and Armada 39x.
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config PCIE_MEDIATEK
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tristate "MediaTek PCIe controller"
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depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST
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depends on OF
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depends on PCI_MSI
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help
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Say Y here if you want to enable PCIe controller support on
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MediaTek SoCs.
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config PCIE_MEDIATEK_GEN3
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tristate "MediaTek Gen3 PCIe controller"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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depends on PCI_MSI
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help
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Adds support for PCIe Gen3 MAC controller for MediaTek SoCs.
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This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed,
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and support up to 256 MSI interrupt numbers for
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multi-function devices.
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Say Y here if you want to enable Gen3 PCIe controller support on
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MediaTek SoCs.
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config PCIE_MT7621
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tristate "MediaTek MT7621 PCIe controller"
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depends on SOC_MT7621 || COMPILE_TEST
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select PHY_MT7621_PCI
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default SOC_MT7621
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help
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This selects a driver for the MediaTek MT7621 PCIe Controller.
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config PCIE_MICROCHIP_HOST
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tristate "Microchip AXI PCIe controller"
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depends on PCI_MSI && OF
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select PCI_HOST_COMMON
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help
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Say Y here if you want kernel to support the Microchip AXI PCIe
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Host Bridge driver.
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config PCI_HYPERV_INTERFACE
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tristate "Microsoft Hyper-V PCI Interface"
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depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI
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help
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The Hyper-V PCI Interface is a helper driver that allows other
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drivers to have a common interface with the Hyper-V PCI frontend
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driver.
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config PCI_TEGRA
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bool "NVIDIA Tegra PCIe controller"
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depends on ARCH_TEGRA || COMPILE_TEST
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depends on PCI_MSI
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help
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Say Y here if you want support for the PCIe host controller found
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on NVIDIA Tegra SoCs.
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config PCIE_RCAR_HOST
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bool "Renesas R-Car PCIe controller (host mode)"
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depends on ARCH_RENESAS || COMPILE_TEST
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depends on PCI_MSI
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help
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Say Y here if you want PCIe controller support on R-Car SoCs in host
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mode.
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config PCIE_RCAR_EP
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bool "Renesas R-Car PCIe controller (endpoint mode)"
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depends on ARCH_RENESAS || COMPILE_TEST
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depends on PCI_ENDPOINT
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help
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Say Y here if you want PCIe controller support on R-Car SoCs in
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endpoint mode.
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config PCI_RCAR_GEN2
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bool "Renesas R-Car Gen2 Internal PCI controller"
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depends on ARCH_RENESAS || COMPILE_TEST
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depends on ARM
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help
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Say Y here if you want internal PCI support on R-Car Gen2 SoC.
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There are 3 internal PCI controllers available with a single
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built-in EHCI/OHCI host controller present on each one.
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config PCIE_ROCKCHIP
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bool
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depends on PCI
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config PCIE_ROCKCHIP_HOST
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tristate "Rockchip PCIe controller (host mode)"
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depends on ARCH_ROCKCHIP || COMPILE_TEST
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depends on OF
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depends on PCI_MSI
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select MFD_SYSCON
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select PCIE_ROCKCHIP
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help
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Say Y here if you want internal PCI support on Rockchip SoC.
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There is 1 internal PCIe port available to support GEN2 with
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4 slots.
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config PCIE_ROCKCHIP_EP
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bool "Rockchip PCIe controller (endpoint mode)"
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depends on ARCH_ROCKCHIP || COMPILE_TEST
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depends on OF
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depends on PCI_ENDPOINT
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select MFD_SYSCON
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select PCIE_ROCKCHIP
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help
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Say Y here if you want to support Rockchip PCIe controller in
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endpoint mode on Rockchip SoC. There is 1 internal PCIe port
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available to support GEN2 with 4 slots.
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config PCI_V3_SEMI
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bool "V3 Semiconductor PCI controller"
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depends on OF
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depends on ARM || COMPILE_TEST
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default ARCH_INTEGRATOR_AP
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config PCI_XGENE
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bool "X-Gene PCIe controller"
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depends on ARM64 || COMPILE_TEST
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depends on OF || (ACPI && PCI_QUIRKS)
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help
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Say Y here if you want internal PCI support on APM X-Gene SoC.
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There are 5 internal PCIe ports available. Each port is GEN3 capable
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and have varied lanes from x1 to x8.
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config PCI_XGENE_MSI
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bool "X-Gene v1 PCIe MSI feature"
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depends on PCI_XGENE
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depends on PCI_MSI
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default y
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help
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Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC.
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This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC.
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config PCIE_XILINX
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bool "Xilinx AXI PCIe controller"
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depends on OF
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depends on PCI_MSI
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help
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Say 'Y' here if you want kernel to support the Xilinx AXI PCIe
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Host Bridge driver.
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config PCIE_XILINX_NWL
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bool "Xilinx NWL PCIe controller"
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depends on ARCH_ZYNQMP || COMPILE_TEST
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depends on PCI_MSI
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help
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Say 'Y' here if you want kernel support for Xilinx
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NWL PCIe controller. The controller can act as Root Port
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or End Point. The current option selection will only
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support root port enabling.
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config PCIE_XILINX_CPM
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bool "Xilinx Versal CPM PCI controller"
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depends on ARCH_ZYNQMP || COMPILE_TEST
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select PCI_HOST_COMMON
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help
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Say 'Y' here if you want kernel support for the
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Xilinx Versal CPM host bridge.
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source "drivers/pci/controller/cadence/Kconfig"
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source "drivers/pci/controller/dwc/Kconfig"
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source "drivers/pci/controller/mobiveil/Kconfig"
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endmenu
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