2c69679626
The port PLL selection needs to be up-to-date in the CRTC state of both the primary and all secondary MST streams. The commit removing the encoder update_prepare/complete hooks (see Fixes: below), stopped doing this for secondary streams, fix this up. Fixes:0f752b2178("drm/i915: Remove the encoder update_prepare()/complete() hooks") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8336 Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230414173800.590790-1-imre.deak@intel.com (cherry picked from commit27ac123b45) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
79 lines
3.3 KiB
C
79 lines
3.3 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DDI_H__
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#define __INTEL_DDI_H__
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#include "i915_reg_defs.h"
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struct drm_connector_state;
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struct drm_i915_private;
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struct intel_atomic_state;
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struct intel_connector;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_dpll_hw_state;
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struct intel_encoder;
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struct intel_shared_dpll;
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enum pipe;
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enum port;
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enum transcoder;
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i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
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struct intel_encoder *intel_encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state);
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void intel_ddi_enable_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_clock(struct intel_encoder *encoder);
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void intel_ddi_get_clock(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state,
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struct intel_shared_dpll *pll);
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void hsw_ddi_enable_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void hsw_ddi_disable_clock(struct intel_encoder *encoder);
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bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
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enum icl_port_dpll_id
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intel_ddi_port_pll_type(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void hsw_ddi_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state);
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struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
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void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
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enum port port);
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void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
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bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
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void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
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void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_ddi_disable_transcoder_clock(const struct intel_crtc_state *crtc_state);
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void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
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void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
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bool state);
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void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
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struct intel_crtc_state *crtc_state);
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int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
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enum transcoder cpu_transcoder,
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bool enable, u32 hdcp_mask);
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void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
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int intel_ddi_level(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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int lane);
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void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
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struct intel_encoder *encoder,
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struct intel_crtc *crtc);
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#endif /* __INTEL_DDI_H__ */
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