4cf05a4d71
MTL introduces a second FBC engine. The two FBC engines can operate entirely independently, FBC A serving pipe A and FBC B serving pipe B. The one place where things might go a bit wrong is the CFB allocation from stolen. We might have to consider some change to the allocation strategy to have a better chance of both engines being able to allocate its CFB. Maybe FBC A should allocate bottom up and FBC B top down, or something? For the moment the allocation strategy is DRM_MM_INSERT_BEST for both. Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817122624.213889-1-jani.nikula@intel.com
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_FBC_H__
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#define __INTEL_FBC_H__
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#include <linux/types.h>
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enum fb_op_origin;
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struct drm_i915_private;
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struct intel_atomic_state;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_fbc;
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struct intel_plane;
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struct intel_plane_state;
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enum intel_fbc_id {
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INTEL_FBC_A,
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INTEL_FBC_B,
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I915_MAX_FBCS,
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};
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int intel_fbc_atomic_check(struct intel_atomic_state *state);
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bool intel_fbc_pre_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_post_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_init(struct drm_i915_private *dev_priv);
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void intel_fbc_cleanup(struct drm_i915_private *dev_priv);
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void intel_fbc_sanitize(struct drm_i915_private *dev_priv);
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void intel_fbc_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_fbc_disable(struct intel_crtc *crtc);
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void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
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unsigned int frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_fbc_flush(struct drm_i915_private *dev_priv,
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unsigned int frontbuffer_bits, enum fb_op_origin origin);
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void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
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void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
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void intel_fbc_reset_underrun(struct drm_i915_private *i915);
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void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
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void intel_fbc_debugfs_register(struct drm_i915_private *i915);
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#endif /* __INTEL_FBC_H__ */
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