6e43e276b8
All GEN12 platforms supports PSR2 selective fetch but not all GEN12 platforms supports PSR2 hardware tracking(aka RKL). This feature consists in software programming registers with the damaged area of each plane this way hardware will only fetch from memory those areas and sent the PSR2 selective update blocks to panel, saving even more power. But as initial step it is only enabling the full frame fetch at every flip, the actual selective fetch part will come in a future patch. Also this is only handling the page flip side, it is still completely missing frontbuffer modifications, that is why the enable_psr2_sel_fetch parameter was added. v3: - calling intel_psr2_sel_fetch_update() during the atomic check phase (Ville) BSpec: 55229 Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200810174144.76761-1-jose.souza@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
52 lines
2 KiB
C
52 lines
2 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_PSR_H__
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#define __INTEL_PSR_H__
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#include "intel_frontbuffer.h"
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struct drm_connector;
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struct drm_connector_state;
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struct drm_i915_private;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_crtc;
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struct intel_atomic_state;
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#define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support)
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void intel_psr_init_dpcd(struct intel_dp *intel_dp);
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void intel_psr_enable(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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void intel_psr_disable(struct intel_dp *intel_dp,
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const struct intel_crtc_state *old_crtc_state);
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void intel_psr_update(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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int intel_psr_debug_set(struct drm_i915_private *dev_priv, u64 value);
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void intel_psr_invalidate(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_flush(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_init(struct drm_i915_private *dev_priv);
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void intel_psr_compute_config(struct intel_dp *intel_dp,
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struct intel_crtc_state *crtc_state);
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void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir);
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void intel_psr_short_pulse(struct intel_dp *intel_dp);
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int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state,
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u32 *out_value);
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bool intel_psr_enabled(struct intel_dp *intel_dp);
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void intel_psr_atomic_check(struct drm_connector *connector,
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struct drm_connector_state *old_state,
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struct drm_connector_state *new_state);
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void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp);
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void intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state);
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#endif /* __INTEL_PSR_H__ */
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