The i.MX95 ENETC has been upgraded to revision 4.1, which is different from the LS1028A ENETC (revision 1.0) except for the SI part. Therefore, the fsl-enetc driver is incompatible with i.MX95 ENETC PF. So add new nxp-enetc4 driver to support i.MX95 ENETC PF, and this driver will be used to support the ENETC PF with major revision 4 for other SoCs in the future. Currently, the nxp-enetc4 driver only supports basic transmission feature for i.MX95 ENETC PF, the more basic and advanced features will be added in the subsequent patches. In addition, PCS support has not been added yet, so 10G ENETC (ENETC instance 2) is not supported now. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
336 lines
8.3 KiB
C
336 lines
8.3 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/* Copyright 2024 NXP */
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#include <linux/fsl/enetc_mdio.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include "enetc_pf_common.h"
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static void enetc_set_si_hw_addr(struct enetc_pf *pf, int si,
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const u8 *mac_addr)
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{
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struct enetc_hw *hw = &pf->si->hw;
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pf->ops->set_si_primary_mac(hw, si, mac_addr);
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}
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static void enetc_get_si_hw_addr(struct enetc_pf *pf, int si, u8 *mac_addr)
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{
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struct enetc_hw *hw = &pf->si->hw;
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pf->ops->get_si_primary_mac(hw, si, mac_addr);
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}
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int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)
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{
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struct enetc_ndev_priv *priv = netdev_priv(ndev);
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struct enetc_pf *pf = enetc_si_priv(priv->si);
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struct sockaddr *saddr = addr;
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if (!is_valid_ether_addr(saddr->sa_data))
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return -EADDRNOTAVAIL;
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eth_hw_addr_set(ndev, saddr->sa_data);
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enetc_set_si_hw_addr(pf, 0, saddr->sa_data);
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return 0;
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}
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EXPORT_SYMBOL_GPL(enetc_pf_set_mac_addr);
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static int enetc_setup_mac_address(struct device_node *np, struct enetc_pf *pf,
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int si)
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{
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struct device *dev = &pf->si->pdev->dev;
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u8 mac_addr[ETH_ALEN] = { 0 };
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int err;
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/* (1) try to get the MAC address from the device tree */
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if (np) {
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err = of_get_mac_address(np, mac_addr);
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if (err == -EPROBE_DEFER)
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return err;
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}
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/* (2) bootloader supplied MAC address */
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if (is_zero_ether_addr(mac_addr))
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enetc_get_si_hw_addr(pf, si, mac_addr);
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/* (3) choose a random one */
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if (is_zero_ether_addr(mac_addr)) {
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eth_random_addr(mac_addr);
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dev_info(dev, "no MAC address specified for SI%d, using %pM\n",
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si, mac_addr);
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}
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enetc_set_si_hw_addr(pf, si, mac_addr);
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return 0;
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}
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int enetc_setup_mac_addresses(struct device_node *np, struct enetc_pf *pf)
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{
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int err, i;
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/* The PF might take its MAC from the device tree */
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err = enetc_setup_mac_address(np, pf, 0);
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if (err)
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return err;
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for (i = 0; i < pf->total_vfs; i++) {
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err = enetc_setup_mac_address(NULL, pf, i + 1);
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if (err)
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return err;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(enetc_setup_mac_addresses);
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void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
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const struct net_device_ops *ndev_ops)
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{
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struct enetc_ndev_priv *priv = netdev_priv(ndev);
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struct enetc_pf *pf = enetc_si_priv(si);
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SET_NETDEV_DEV(ndev, &si->pdev->dev);
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priv->ndev = ndev;
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priv->si = si;
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priv->dev = &si->pdev->dev;
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si->ndev = ndev;
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priv->msg_enable = (NETIF_MSG_WOL << 1) - 1;
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priv->sysclk_freq = si->drvdata->sysclk_freq;
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ndev->netdev_ops = ndev_ops;
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enetc_set_ethtool_ops(ndev);
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ndev->watchdog_timeo = 5 * HZ;
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ndev->max_mtu = ENETC_MAX_MTU;
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ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
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NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
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NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK |
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NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
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ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |
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NETIF_F_HW_VLAN_CTAG_TX |
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NETIF_F_HW_VLAN_CTAG_RX |
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NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
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ndev->vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |
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NETIF_F_TSO | NETIF_F_TSO6;
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ndev->priv_flags |= IFF_UNICAST_FLT;
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/* TODO: currently, i.MX95 ENETC driver does not support advanced features */
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if (!is_enetc_rev1(si)) {
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ndev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK);
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goto end;
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}
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if (si->num_rss)
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ndev->hw_features |= NETIF_F_RXHASH;
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ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
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NETDEV_XDP_ACT_NDO_XMIT | NETDEV_XDP_ACT_RX_SG |
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NETDEV_XDP_ACT_NDO_XMIT_SG;
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if (si->hw_features & ENETC_SI_F_PSFP && pf->ops->enable_psfp &&
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!pf->ops->enable_psfp(priv)) {
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priv->active_offloads |= ENETC_F_QCI;
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ndev->features |= NETIF_F_HW_TC;
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ndev->hw_features |= NETIF_F_HW_TC;
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}
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end:
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/* pick up primary MAC address from SI */
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enetc_load_primary_mac_addr(&si->hw, ndev);
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}
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EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);
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static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
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{
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struct device *dev = &pf->si->pdev->dev;
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struct enetc_mdio_priv *mdio_priv;
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struct mii_bus *bus;
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int err;
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bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
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if (!bus)
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return -ENOMEM;
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bus->name = "Freescale ENETC MDIO Bus";
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bus->read = enetc_mdio_read_c22;
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bus->write = enetc_mdio_write_c22;
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bus->read_c45 = enetc_mdio_read_c45;
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bus->write_c45 = enetc_mdio_write_c45;
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bus->parent = dev;
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mdio_priv = bus->priv;
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mdio_priv->hw = &pf->si->hw;
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mdio_priv->mdio_base = ENETC_EMDIO_BASE;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
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err = of_mdiobus_register(bus, np);
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if (err)
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return dev_err_probe(dev, err, "cannot register MDIO bus\n");
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pf->mdio = bus;
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return 0;
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}
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static void enetc_mdio_remove(struct enetc_pf *pf)
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{
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if (pf->mdio)
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mdiobus_unregister(pf->mdio);
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}
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static int enetc_imdio_create(struct enetc_pf *pf)
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{
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struct device *dev = &pf->si->pdev->dev;
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struct enetc_mdio_priv *mdio_priv;
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struct phylink_pcs *phylink_pcs;
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struct mii_bus *bus;
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int err;
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if (!pf->ops->create_pcs) {
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dev_err(dev, "Creating PCS is not supported\n");
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return -EOPNOTSUPP;
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}
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bus = mdiobus_alloc_size(sizeof(*mdio_priv));
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if (!bus)
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return -ENOMEM;
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bus->name = "Freescale ENETC internal MDIO Bus";
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bus->read = enetc_mdio_read_c22;
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bus->write = enetc_mdio_write_c22;
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bus->read_c45 = enetc_mdio_read_c45;
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bus->write_c45 = enetc_mdio_write_c45;
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bus->parent = dev;
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bus->phy_mask = ~0;
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mdio_priv = bus->priv;
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mdio_priv->hw = &pf->si->hw;
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mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));
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err = mdiobus_register(bus);
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if (err) {
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dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);
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goto free_mdio_bus;
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}
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phylink_pcs = pf->ops->create_pcs(pf, bus);
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if (IS_ERR(phylink_pcs)) {
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err = PTR_ERR(phylink_pcs);
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dev_err(dev, "cannot create lynx pcs (%d)\n", err);
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goto unregister_mdiobus;
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}
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pf->imdio = bus;
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pf->pcs = phylink_pcs;
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return 0;
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unregister_mdiobus:
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mdiobus_unregister(bus);
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free_mdio_bus:
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mdiobus_free(bus);
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return err;
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}
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static void enetc_imdio_remove(struct enetc_pf *pf)
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{
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if (pf->pcs && pf->ops->destroy_pcs)
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pf->ops->destroy_pcs(pf->pcs);
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if (pf->imdio) {
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mdiobus_unregister(pf->imdio);
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mdiobus_free(pf->imdio);
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}
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}
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static bool enetc_port_has_pcs(struct enetc_pf *pf)
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{
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return (pf->if_mode == PHY_INTERFACE_MODE_SGMII ||
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pf->if_mode == PHY_INTERFACE_MODE_1000BASEX ||
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pf->if_mode == PHY_INTERFACE_MODE_2500BASEX ||
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pf->if_mode == PHY_INTERFACE_MODE_USXGMII);
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}
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int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)
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{
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struct device_node *mdio_np;
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int err;
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mdio_np = of_get_child_by_name(node, "mdio");
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if (mdio_np) {
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err = enetc_mdio_probe(pf, mdio_np);
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of_node_put(mdio_np);
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if (err)
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return err;
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}
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if (enetc_port_has_pcs(pf)) {
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err = enetc_imdio_create(pf);
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if (err) {
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enetc_mdio_remove(pf);
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return err;
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}
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(enetc_mdiobus_create);
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void enetc_mdiobus_destroy(struct enetc_pf *pf)
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{
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enetc_mdio_remove(pf);
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enetc_imdio_remove(pf);
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}
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EXPORT_SYMBOL_GPL(enetc_mdiobus_destroy);
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int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node,
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const struct phylink_mac_ops *ops)
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{
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struct enetc_pf *pf = enetc_si_priv(priv->si);
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struct phylink *phylink;
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int err;
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pf->phylink_config.dev = &priv->ndev->dev;
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pf->phylink_config.type = PHYLINK_NETDEV;
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pf->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
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MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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pf->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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pf->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_1000BASEX,
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pf->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_2500BASEX,
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pf->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_USXGMII,
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pf->phylink_config.supported_interfaces);
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phy_interface_set_rgmii(pf->phylink_config.supported_interfaces);
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phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node),
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pf->if_mode, ops);
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if (IS_ERR(phylink)) {
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err = PTR_ERR(phylink);
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return err;
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}
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priv->phylink = phylink;
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return 0;
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}
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EXPORT_SYMBOL_GPL(enetc_phylink_create);
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void enetc_phylink_destroy(struct enetc_ndev_priv *priv)
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{
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phylink_destroy(priv->phylink);
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}
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EXPORT_SYMBOL_GPL(enetc_phylink_destroy);
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MODULE_DESCRIPTION("NXP ENETC PF common functionality driver");
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MODULE_LICENSE("Dual BSD/GPL");
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