Evan Quan a2b6df4fd6 drm/amd/pm: support overdrive vddgfx offset setting(V2) ... This is supported by Sienna Cichlid, Navy Flounder and Dimgrey Cavefish. For these ASICs, the target voltage calculation can be illustrated by "voltage = voltage calculated from v/f curve + overdrive vddgfx offset". V2: limit the smu_version check for Sienna Cichlid only Here are some sample usages about this new OD setting: 1. Check current vddgfx offset setting by cat /sys/class/drm/card0/device/pp_od_clk_voltage ... ... OD_VDDGFX_OFFSET: 0mV ... ... 2. Set new vddgfx offset by echo "vo 10" > /sys/class/drm/card0/device/pp_od_clk_voltage cat /sys/class/drm/card0/device/pp_od_clk_voltage ... ... OD_VDDGFX_OFFSET: 10mV ... ... 3. Commit the new setting by echo "c" > /sys/class/drm/card0/device/pp_od_clk_voltage Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-12-23 15:07:03 -05:00
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inc	drm/amd/pm: support overdrive vddgfx offset setting(V2)	2020-12-23 15:07:03 -05:00
powerplay	drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for raven	2020-12-08 23:06:15 -05:00
swsmu	drm/amd/pm: support overdrive vddgfx offset setting(V2)	2020-12-23 15:07:03 -05:00
amdgpu_dpm.c	drm/amdgpu: skip power profile switch in sriov	2020-12-01 15:58:54 -05:00
amdgpu_pm.c	drm/amd/pm: support overdrive vddgfx offset setting(V2)	2020-12-23 15:07:03 -05:00
Makefile	drm/amd/pm: optimize the power related source code layout	2020-08-14 16:22:41 -04:00