Tony Luck a331f5fdd3 x86/mce: Add Xeon Sapphire Rapids to list of CPUs that support PPIN ... New CPU model, same MSRs to control and read the inventory number. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20210319173919.291428-1-tony.luck@intel.com		2021-03-20 12:12:10 +01:00
..
alpha	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
arc	arch: setup PF_IO_WORKER threads like PF_KTHREAD	2021-02-21 17:25:22 -07:00
arm	xen: branch for v5.12-rc2	2021-03-04 11:24:47 -08:00
arm64	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
csky	arch/csky patches for 5.12-rc1	2021-02-28 12:06:45 -08:00
h8300	arch: setup PF_IO_WORKER threads like PF_KTHREAD	2021-02-21 17:25:22 -07:00
hexagon	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
ia64	ia64: don't call handle_signal() unless there's actually a signal queued	2021-03-02 17:22:11 -07:00
m68k	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
microblaze	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
mips	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
nds32	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
nios2	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
openrisc	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
parisc	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
powerpc	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
riscv	RISC-V Patches for the 5.12 Merge Window, Part 2	2021-02-28 12:01:23 -08:00
s390	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
sh	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
sparc	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
um	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
x86	x86/mce: Add Xeon Sapphire Rapids to list of CPUs that support PPIN	2021-03-20 12:12:10 +01:00
xtensa	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
.gitignore
Kconfig	Rework of the X86 irq stack handling:	2021-02-24 16:32:23 -08:00