As we funnel more and more contexts into the breadcrumbs on an engine, the hold time of b->irq_lock grows. As we may then contend with the b->irq_lock during request submission, this increases the burden upon the engine->active.lock and so directly impacts both our execution latency and client latency. If we split the b->irq_lock by introducing a per-context spinlock to manage the signalers within a context, we then only need the b->irq_lock for enabling/disabling the interrupt and can avoid taking the lock for walking the list of contexts within the signal worker. Even with the current setup, this greatly reduces the number of times we have to take and fight for b->irq_lock. Furthermore, this closes the race between enabling the signaling context while it is in the process of being signaled and removed: <4>[ 416.208555] list_add corruption. prev->next should be next (ffff8881951d5910), but was dead000000000100. (prev=ffff8882781bb870). <4>[ 416.208573] WARNING: CPU: 7 PID: 0 at lib/list_debug.c:28 __list_add_valid+0x4d/0x70 <4>[ 416.208575] Modules linked in: i915(+) vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio mei_hdcp x86_pkg_temp_thermal coretemp ax88179_178a usbnet mii crct10dif_pclmul snd_intel_dspcfg crc32_pclmul snd_hda_codec snd_hwdep ghash_clmulni_intel snd_hda_core e1000e snd_pcm ptp pps_core mei_me mei prime_numbers intel_lpss_pci [last unloaded: i915] <4>[ 416.208611] CPU: 7 PID: 0 Comm: swapper/7 Tainted: G U 5.8.0-CI-CI_DRM_8852+ #1 <4>[ 416.208614] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake Y LPDDR4x T4 RVP TLC, BIOS ICLSFWR1.R00.3212.A00.1905212112 05/21/2019 <4>[ 416.208627] RIP: 0010:__list_add_valid+0x4d/0x70 <4>[ 416.208631] Code: c3 48 89 d1 48 c7 c7 60 18 33 82 48 89 c2 e8 ea e0 b6 ff 0f 0b 31 c0 c3 48 89 c1 4c 89 c6 48 c7 c7 b0 18 33 82 e8 d3 e0 b6 ff <0f> 0b 31 c0 c3 48 89 f2 4c 89 c1 48 89 fe 48 c7 c7 00 19 33 82 e8 <4>[ 416.208633] RSP: 0018:ffffc90000280e18 EFLAGS: 00010086 <4>[ 416.208636] RAX: 0000000000000000 RBX: ffff888250a44880 RCX: 0000000000000105 <4>[ 416.208639] RDX: 0000000000000105 RSI: ffffffff82320c5b RDI: 00000000ffffffff <4>[ 416.208641] RBP: ffff8882781bb870 R08: 0000000000000000 R09: 0000000000000001 <4>[ 416.208643] R10: 00000000054d2957 R11: 000000006abbd991 R12: ffff8881951d58c8 <4>[ 416.208646] R13: ffff888286073880 R14: ffff888286073848 R15: ffff8881951d5910 <4>[ 416.208669] FS: 0000000000000000(0000) GS:ffff88829c180000(0000) knlGS:0000000000000000 <4>[ 416.208671] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4>[ 416.208673] CR2: 0000556231326c48 CR3: 0000000005610001 CR4: 0000000000760ee0 <4>[ 416.208675] PKRU: 55555554 <4>[ 416.208677] Call Trace: <4>[ 416.208679] <IRQ> <4>[ 416.208751] i915_request_enable_breadcrumb+0x278/0x400 [i915] <4>[ 416.208839] __i915_request_submit+0xca/0x2a0 [i915] <4>[ 416.208892] __execlists_submission_tasklet+0x480/0x1830 [i915] <4>[ 416.208942] execlists_submission_tasklet+0xc4/0x130 [i915] <4>[ 416.208947] tasklet_action_common.isra.17+0x6c/0x1c0 <4>[ 416.208954] __do_softirq+0xdf/0x498 <4>[ 416.208960] ? handle_fasteoi_irq+0x150/0x150 <4>[ 416.208964] asm_call_on_stack+0xf/0x20 <4>[ 416.208966] </IRQ> <4>[ 416.208969] do_softirq_own_stack+0xa1/0xc0 <4>[ 416.208972] irq_exit_rcu+0xb5/0xc0 <4>[ 416.208976] common_interrupt+0xf7/0x260 <4>[ 416.208980] asm_common_interrupt+0x1e/0x40 <4>[ 416.208985] RIP: 0010:cpuidle_enter_state+0xb6/0x410 <4>[ 416.208987] Code: 00 31 ff e8 9c 3e 89 ff 80 7c 24 0b 00 74 12 9c 58 f6 c4 02 0f 85 31 03 00 00 31 ff e8 e3 6c 90 ff e8 fe a4 94 ff fb 45 85 ed <0f> 88 c7 02 00 00 49 63 c5 4c 2b 24 24 48 8d 14 40 48 8d 14 90 48 <4>[ 416.208989] RSP: 0018:ffffc90000143e70 EFLAGS: 00000206 <4>[ 416.208991] RAX: 0000000000000007 RBX: ffffe8ffffda8070 RCX: 0000000000000000 <4>[ 416.208993] RDX: 0000000000000000 RSI: ffffffff8238b4ee RDI: ffffffff8233184f <4>[ 416.208995] RBP: ffffffff826b4e00 R08: 0000000000000000 R09: 0000000000000000 <4>[ 416.208997] R10: 0000000000000001 R11: 0000000000000000 R12: 00000060e7f24a8f <4>[ 416.208998] R13: 0000000000000003 R14: 0000000000000003 R15: 0000000000000003 <4>[ 416.209012] cpuidle_enter+0x24/0x40 <4>[ 416.209016] do_idle+0x22f/0x2d0 <4>[ 416.209022] cpu_startup_entry+0x14/0x20 <4>[ 416.209025] start_secondary+0x158/0x1a0 <4>[ 416.209030] secondary_startup_64+0xa4/0xb0 <4>[ 416.209039] irq event stamp: 10186977 <4>[ 416.209042] hardirqs last enabled at (10186976): [<ffffffff810b9363>] tasklet_action_common.isra.17+0xe3/0x1c0 <4>[ 416.209044] hardirqs last disabled at (10186977): [<ffffffff81a5e5ed>] _raw_spin_lock_irqsave+0xd/0x50 <4>[ 416.209047] softirqs last enabled at (10186968): [<ffffffff810b9a1a>] irq_enter_rcu+0x6a/0x70 <4>[ 416.209049] softirqs last disabled at (10186969): [<ffffffff81c00f4f>] asm_call_on_stack+0xf/0x20 <4>[ 416.209317] list_del corruption, ffff8882781bb870->next is LIST_POISON1 (dead000000000100) <4>[ 416.209317] WARNING: CPU: 7 PID: 46 at lib/list_debug.c:47 __list_del_entry_valid+0x4e/0x90 <4>[ 416.209317] Modules linked in: i915(+) vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio mei_hdcp x86_pkg_temp_thermal coretemp ax88179_178a usbnet mii crct10dif_pclmul snd_intel_dspcfg crc32_pclmul snd_hda_codec snd_hwdep ghash_clmulni_intel snd_hda_core e1000e snd_pcm ptp pps_core mei_me mei prime_numbers intel_lpss_pci [last unloaded: i915] <4>[ 416.209317] CPU: 7 PID: 46 Comm: ksoftirqd/7 Tainted: G U W 5.8.0-CI-CI_DRM_8852+ #1 <4>[ 416.209317] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake Y LPDDR4x T4 RVP TLC, BIOS ICLSFWR1.R00.3212.A00.1905212112 05/21/2019 <4>[ 416.209317] RIP: 0010:__list_del_entry_valid+0x4e/0x90 <4>[ 416.209317] Code: 2e 48 8b 32 48 39 fe 75 3a 48 8b 50 08 48 39 f2 75 48 b8 01 00 00 00 c3 48 89 fe 48 89 c2 48 c7 c7 38 19 33 82 e8 62 e0 b6 ff <0f> 0b 31 c0 c3 48 89 fe 48 c7 c7 70 19 33 82 e8 4e e0 b6 ff 0f 0b <4>[ 416.209317] RSP: 0018:ffffc90000280de8 EFLAGS: 00010086 <4>[ 416.209317] RAX: 0000000000000000 RBX: ffff8882781bb848 RCX: 0000000000010104 <4>[ 416.209317] RDX: 0000000000010104 RSI: ffffffff8238b4ee RDI: 00000000ffffffff <4>[ 416.209317] RBP: ffff8882781bb880 R08: 0000000000000000 R09: 0000000000000001 <4>[ 416.209317] R10: 000000009fb6666e R11: 00000000feca9427 R12: ffffc90000280e18 <4>[ 416.209317] R13: ffff8881951d5930 R14: dead0000000000d8 R15: ffff8882781bb880 <4>[ 416.209317] FS: 0000000000000000(0000) GS:ffff88829c180000(0000) knlGS:0000000000000000 <4>[ 416.209317] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4>[ 416.209317] CR2: 0000556231326c48 CR3: 0000000005610001 CR4: 0000000000760ee0 <4>[ 416.209317] PKRU: 55555554 <4>[ 416.209317] Call Trace: <4>[ 416.209317] <IRQ> <4>[ 416.209317] remove_signaling_context.isra.13+0xd/0x70 [i915] <4>[ 416.209513] signal_irq_work+0x1f7/0x4b0 [i915] This is caused by virtual engines where although we take the breadcrumb lock on each of the active engines, they may be different engines on different requests, It turns out that the b->irq_lock was not a sufficient proxy for the engine->active.lock in the case of more than one request, so introduce an explicit lock around ce->signals. v2: ce->signal_lock is acquired with only RCU protection and so must be treated carefully and not cleared during reallocation. We also then need to confirm that the ce we lock is the same as we found in the breadcrumb list. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2276 Fixes:c18636f763
("drm/i915: Remove requirement for holding i915_request.lock for breadcrumbs") Fixes:2854d86632
("drm/i915/gt: Replace intel_engine_transfer_stale_breadcrumbs") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201126140407.31952-4-chris@chris-wilson.co.uk (cherry picked from commitc744d50363
) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
506 lines
11 KiB
C
506 lines
11 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#include "gem/i915_gem_context.h"
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#include "gem/i915_gem_pm.h"
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#include "i915_drv.h"
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#include "i915_globals.h"
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#include "intel_context.h"
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#include "intel_engine.h"
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#include "intel_engine_pm.h"
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#include "intel_ring.h"
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static struct i915_global_context {
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struct i915_global base;
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struct kmem_cache *slab_ce;
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} global;
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static struct intel_context *intel_context_alloc(void)
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{
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return kmem_cache_zalloc(global.slab_ce, GFP_KERNEL);
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}
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static void rcu_context_free(struct rcu_head *rcu)
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{
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struct intel_context *ce = container_of(rcu, typeof(*ce), rcu);
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kmem_cache_free(global.slab_ce, ce);
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}
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void intel_context_free(struct intel_context *ce)
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{
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call_rcu(&ce->rcu, rcu_context_free);
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}
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struct intel_context *
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intel_context_create(struct intel_engine_cs *engine)
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{
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struct intel_context *ce;
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ce = intel_context_alloc();
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if (!ce)
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return ERR_PTR(-ENOMEM);
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intel_context_init(ce, engine);
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return ce;
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}
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int intel_context_alloc_state(struct intel_context *ce)
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{
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int err = 0;
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if (mutex_lock_interruptible(&ce->pin_mutex))
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return -EINTR;
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if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
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if (intel_context_is_banned(ce)) {
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err = -EIO;
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goto unlock;
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}
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err = ce->ops->alloc(ce);
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if (unlikely(err))
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goto unlock;
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set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
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}
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unlock:
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mutex_unlock(&ce->pin_mutex);
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return err;
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}
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static int intel_context_active_acquire(struct intel_context *ce)
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{
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int err;
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__i915_active_acquire(&ce->active);
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if (intel_context_is_barrier(ce))
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return 0;
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/* Preallocate tracking nodes */
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err = i915_active_acquire_preallocate_barrier(&ce->active,
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ce->engine);
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if (err)
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i915_active_release(&ce->active);
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return err;
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}
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static void intel_context_active_release(struct intel_context *ce)
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{
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/* Nodes preallocated in intel_context_active() */
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i915_active_acquire_barrier(&ce->active);
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i915_active_release(&ce->active);
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}
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static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww)
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{
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unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
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int err;
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err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH);
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if (err)
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return err;
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err = i915_active_acquire(&vma->active);
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if (err)
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goto err_unpin;
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/*
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* And mark it as a globally pinned object to let the shrinker know
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* it cannot reclaim the object until we release it.
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*/
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i915_vma_make_unshrinkable(vma);
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vma->obj->mm.dirty = true;
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return 0;
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err_unpin:
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i915_vma_unpin(vma);
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return err;
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}
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static void __context_unpin_state(struct i915_vma *vma)
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{
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i915_vma_make_shrinkable(vma);
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i915_active_release(&vma->active);
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__i915_vma_unpin(vma);
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}
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static int __ring_active(struct intel_ring *ring,
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struct i915_gem_ww_ctx *ww)
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{
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int err;
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err = intel_ring_pin(ring, ww);
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if (err)
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return err;
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err = i915_active_acquire(&ring->vma->active);
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if (err)
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goto err_pin;
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return 0;
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err_pin:
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intel_ring_unpin(ring);
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return err;
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}
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static void __ring_retire(struct intel_ring *ring)
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{
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i915_active_release(&ring->vma->active);
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intel_ring_unpin(ring);
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}
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static int intel_context_pre_pin(struct intel_context *ce,
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struct i915_gem_ww_ctx *ww)
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{
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int err;
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CE_TRACE(ce, "active\n");
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err = __ring_active(ce->ring, ww);
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if (err)
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return err;
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err = intel_timeline_pin(ce->timeline, ww);
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if (err)
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goto err_ring;
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if (!ce->state)
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return 0;
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err = __context_pin_state(ce->state, ww);
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if (err)
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goto err_timeline;
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return 0;
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err_timeline:
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intel_timeline_unpin(ce->timeline);
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err_ring:
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__ring_retire(ce->ring);
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return err;
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}
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static void intel_context_post_unpin(struct intel_context *ce)
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{
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if (ce->state)
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__context_unpin_state(ce->state);
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intel_timeline_unpin(ce->timeline);
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__ring_retire(ce->ring);
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}
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int __intel_context_do_pin_ww(struct intel_context *ce,
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struct i915_gem_ww_ctx *ww)
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{
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bool handoff = false;
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void *vaddr;
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int err = 0;
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if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
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err = intel_context_alloc_state(ce);
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if (err)
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return err;
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}
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/*
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* We always pin the context/ring/timeline here, to ensure a pin
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* refcount for __intel_context_active(), which prevent a lock
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* inversion of ce->pin_mutex vs dma_resv_lock().
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*/
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err = i915_gem_object_lock(ce->timeline->hwsp_ggtt->obj, ww);
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if (!err && ce->ring->vma->obj)
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err = i915_gem_object_lock(ce->ring->vma->obj, ww);
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if (!err && ce->state)
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err = i915_gem_object_lock(ce->state->obj, ww);
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if (!err)
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err = intel_context_pre_pin(ce, ww);
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if (err)
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return err;
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err = i915_active_acquire(&ce->active);
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if (err)
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goto err_ctx_unpin;
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err = ce->ops->pre_pin(ce, ww, &vaddr);
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if (err)
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goto err_release;
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err = mutex_lock_interruptible(&ce->pin_mutex);
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if (err)
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goto err_post_unpin;
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if (unlikely(intel_context_is_closed(ce))) {
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err = -ENOENT;
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goto err_unlock;
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}
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if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) {
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err = intel_context_active_acquire(ce);
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if (unlikely(err))
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goto err_unlock;
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err = ce->ops->pin(ce, vaddr);
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if (err) {
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intel_context_active_release(ce);
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goto err_unlock;
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}
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CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n",
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i915_ggtt_offset(ce->ring->vma),
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ce->ring->head, ce->ring->tail);
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handoff = true;
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smp_mb__before_atomic(); /* flush pin before it is visible */
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atomic_inc(&ce->pin_count);
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}
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GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */
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err_unlock:
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mutex_unlock(&ce->pin_mutex);
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err_post_unpin:
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if (!handoff)
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ce->ops->post_unpin(ce);
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err_release:
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i915_active_release(&ce->active);
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err_ctx_unpin:
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intel_context_post_unpin(ce);
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/*
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* Unlock the hwsp_ggtt object since it's shared.
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* In principle we can unlock all the global state locked above
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* since it's pinned and doesn't need fencing, and will
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* thus remain resident until it is explicitly unpinned.
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*/
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i915_gem_ww_unlock_single(ce->timeline->hwsp_ggtt->obj);
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return err;
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}
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int __intel_context_do_pin(struct intel_context *ce)
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{
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struct i915_gem_ww_ctx ww;
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int err;
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i915_gem_ww_ctx_init(&ww, true);
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retry:
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err = __intel_context_do_pin_ww(ce, &ww);
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if (err == -EDEADLK) {
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err = i915_gem_ww_ctx_backoff(&ww);
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if (!err)
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goto retry;
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}
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i915_gem_ww_ctx_fini(&ww);
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return err;
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}
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void intel_context_unpin(struct intel_context *ce)
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{
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if (!atomic_dec_and_test(&ce->pin_count))
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return;
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CE_TRACE(ce, "unpin\n");
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ce->ops->unpin(ce);
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ce->ops->post_unpin(ce);
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/*
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* Once released, we may asynchronously drop the active reference.
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* As that may be the only reference keeping the context alive,
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* take an extra now so that it is not freed before we finish
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* dereferencing it.
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*/
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intel_context_get(ce);
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intel_context_active_release(ce);
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intel_context_put(ce);
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}
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__i915_active_call
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static void __intel_context_retire(struct i915_active *active)
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{
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struct intel_context *ce = container_of(active, typeof(*ce), active);
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CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
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intel_context_get_total_runtime_ns(ce),
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intel_context_get_avg_runtime_ns(ce));
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set_bit(CONTEXT_VALID_BIT, &ce->flags);
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intel_context_post_unpin(ce);
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intel_context_put(ce);
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}
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static int __intel_context_active(struct i915_active *active)
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{
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struct intel_context *ce = container_of(active, typeof(*ce), active);
|
|
|
|
intel_context_get(ce);
|
|
|
|
/* everything should already be activated by intel_context_pre_pin() */
|
|
GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active));
|
|
__intel_ring_pin(ce->ring);
|
|
|
|
__intel_timeline_pin(ce->timeline);
|
|
|
|
if (ce->state) {
|
|
GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active));
|
|
__i915_vma_pin(ce->state);
|
|
i915_vma_make_unshrinkable(ce->state);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine)
|
|
{
|
|
GEM_BUG_ON(!engine->cops);
|
|
GEM_BUG_ON(!engine->gt->vm);
|
|
|
|
kref_init(&ce->ref);
|
|
|
|
ce->engine = engine;
|
|
ce->ops = engine->cops;
|
|
ce->sseu = engine->sseu;
|
|
ce->ring = __intel_context_ring_size(SZ_4K);
|
|
|
|
ewma_runtime_init(&ce->runtime.avg);
|
|
|
|
ce->vm = i915_vm_get(engine->gt->vm);
|
|
|
|
/* NB ce->signal_link/lock is used under RCU */
|
|
spin_lock_init(&ce->signal_lock);
|
|
INIT_LIST_HEAD(&ce->signals);
|
|
|
|
mutex_init(&ce->pin_mutex);
|
|
|
|
i915_active_init(&ce->active,
|
|
__intel_context_active, __intel_context_retire);
|
|
}
|
|
|
|
void intel_context_fini(struct intel_context *ce)
|
|
{
|
|
if (ce->timeline)
|
|
intel_timeline_put(ce->timeline);
|
|
i915_vm_put(ce->vm);
|
|
|
|
mutex_destroy(&ce->pin_mutex);
|
|
i915_active_fini(&ce->active);
|
|
}
|
|
|
|
static void i915_global_context_shrink(void)
|
|
{
|
|
kmem_cache_shrink(global.slab_ce);
|
|
}
|
|
|
|
static void i915_global_context_exit(void)
|
|
{
|
|
kmem_cache_destroy(global.slab_ce);
|
|
}
|
|
|
|
static struct i915_global_context global = { {
|
|
.shrink = i915_global_context_shrink,
|
|
.exit = i915_global_context_exit,
|
|
} };
|
|
|
|
int __init i915_global_context_init(void)
|
|
{
|
|
global.slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN);
|
|
if (!global.slab_ce)
|
|
return -ENOMEM;
|
|
|
|
i915_global_register(&global.base);
|
|
return 0;
|
|
}
|
|
|
|
void intel_context_enter_engine(struct intel_context *ce)
|
|
{
|
|
intel_engine_pm_get(ce->engine);
|
|
intel_timeline_enter(ce->timeline);
|
|
}
|
|
|
|
void intel_context_exit_engine(struct intel_context *ce)
|
|
{
|
|
intel_timeline_exit(ce->timeline);
|
|
intel_engine_pm_put(ce->engine);
|
|
}
|
|
|
|
int intel_context_prepare_remote_request(struct intel_context *ce,
|
|
struct i915_request *rq)
|
|
{
|
|
struct intel_timeline *tl = ce->timeline;
|
|
int err;
|
|
|
|
/* Only suitable for use in remotely modifying this context */
|
|
GEM_BUG_ON(rq->context == ce);
|
|
|
|
if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */
|
|
/* Queue this switch after current activity by this context. */
|
|
err = i915_active_fence_set(&tl->last_request, rq);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Guarantee context image and the timeline remains pinned until the
|
|
* modifying request is retired by setting the ce activity tracker.
|
|
*
|
|
* But we only need to take one pin on the account of it. Or in other
|
|
* words transfer the pinned ce object to tracked active request.
|
|
*/
|
|
GEM_BUG_ON(i915_active_is_idle(&ce->active));
|
|
return i915_active_add_request(&ce->active, rq);
|
|
}
|
|
|
|
struct i915_request *intel_context_create_request(struct intel_context *ce)
|
|
{
|
|
struct i915_gem_ww_ctx ww;
|
|
struct i915_request *rq;
|
|
int err;
|
|
|
|
i915_gem_ww_ctx_init(&ww, true);
|
|
retry:
|
|
err = intel_context_pin_ww(ce, &ww);
|
|
if (!err) {
|
|
rq = i915_request_create(ce);
|
|
intel_context_unpin(ce);
|
|
} else if (err == -EDEADLK) {
|
|
err = i915_gem_ww_ctx_backoff(&ww);
|
|
if (!err)
|
|
goto retry;
|
|
rq = ERR_PTR(err);
|
|
} else {
|
|
rq = ERR_PTR(err);
|
|
}
|
|
|
|
i915_gem_ww_ctx_fini(&ww);
|
|
|
|
if (IS_ERR(rq))
|
|
return rq;
|
|
|
|
/*
|
|
* timeline->mutex should be the inner lock, but is used as outer lock.
|
|
* Hack around this to shut up lockdep in selftests..
|
|
*/
|
|
lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie);
|
|
mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_);
|
|
mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_);
|
|
rq->cookie = lockdep_pin_lock(&ce->timeline->mutex);
|
|
|
|
return rq;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftest_context.c"
|
|
#endif
|