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linux/drivers/gpu/drm/amd/include
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Nicholas Kazlauskas 9470620e99 drm/amd/display: Enable PSR by default on newer DCN 
[Why]
For optimal power savings on panels that can support it.

This was previously left disabled by default because of issues with
compositors that do not pageflip and scan out directly to the
frontbuffer.

For these compositors we now have detection methods that wait for x
number of pageflips after a full update - triggered by a buffer or
format change typically.

This may introduce bugs or new cases not tested by users so this is
only currently targeting newer DCN.

[How]
Add code in DM to set PSR state by default for newer DCN while falling
back to the feature mask for older.

Add a global debug flag that can be set to disable it for either.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-10-13 14:14:34 -04:00
..
asic_reg drm/amdgpu: add cyan_skillfish asic header files 2021-09-29 17:30:00 -04:00
ivsrcid drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag 2021-04-09 16:54:42 -04:00
aldebaran_ip_offset.h drm/amd/include/aldebaran_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-05-21 10:32:16 -04:00
amd_acpi.h drm/amdgpu: support atcs method powershift (v4) 2021-06-01 22:36:48 -04:00
amd_pcie.h drm/amdgpu:Add pcie gen5 support in pcie capability. 2021-01-21 09:54:56 -05:00
amd_pcie_helpers.h gpu: drm: amd/radeon: Convert printk(KERN_<LEVEL> to pr_<level> 2017-03-29 23:53:24 -04:00
amd_shared.h drm/amd/display: Enable PSR by default on newer DCN 2021-10-13 14:14:34 -04:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atom-names.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atom-types.h drm/amdgpu: move some atombios definitions to common folder (v2) 2015-08-17 16:50:19 -04:00
atombios.h gpu: amd: replace open-coded offsetof() with builtin 2021-09-29 17:30:00 -04:00
atomfirmware.h drm/amd/display: Add DP 2.0 BIOS and DMUB Support 2021-09-01 16:55:10 -04:00
atomfirmwareid.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
beige_goby_ip_offset.h drm/amd/amdgpu: initialize IP offset for beige_goby 2021-05-19 22:40:09 -04:00
cgs_common.h drm/amdgpu: retire indirect mmio reg support from cgs 2020-04-09 10:43:18 -04:00
cik_structs.h drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd 2019-05-24 12:21:01 -05:00
cyan_skillfish_ip_offset.h drm/amdgpu: dynamic initialize ip offset for cyan_skillfish 2021-07-23 10:08:00 -04:00
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h drm/amdgpu/discovery: reserve discovery data at the top of VRAM 2019-10-15 15:48:46 -04:00
displayobject.h drm/amdgpu: add the new atomfirmware interface header 2017-03-29 23:54:15 -04:00
dm_pp_interface.h drm/amd/pp: Remove the same struct define in powerplay 2018-07-05 16:40:02 -05:00
kgd_kfd_interface.h drm/amdkfd: CWSR with software scheduler 2021-08-11 17:19:54 -04:00
kgd_pp_interface.h drm/amd/pm: drop the unnecessary intermediate percent-based transition 2021-08-16 15:35:56 -04:00
navi10_enum.h drm/amdgpu: Update NV SIMD-per-CU to 2 2021-07-01 00:05:18 -04:00
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h drm/amdgpu: add raven related define in pptable.h. 2017-05-24 17:41:50 -04:00
renoir_ip_offset.h drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h drm/amdgpu: add HWID of SDMA instance 2 and 3 2021-10-04 15:23:01 -04:00
soc15_ih_clientid.h drm/amdgpu: Fix IH client ID naming table 2021-03-23 22:53:22 -04:00
v9_structs.h drm/amdkfd: Extend CU mask to 8 SEs (v3) 2019-08-02 10:19:11 -05:00
v10_structs.h drm/amdgpu: add v10 structs header (v2) 2019-06-20 21:16:37 -05:00
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h drm/amdgpu: Support new arcturus mtype 2019-09-13 17:35:48 -05:00
vega10_ip_offset.h drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused 2020-11-13 17:29:46 -05:00
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h drm/amdkfd: Check HIQ's MQD for queue preemption status 2021-03-23 22:59:25 -04:00
yellow_carp_offset.h drm/amdgpu: add yellow_carp_reg_base_init function for yellow carp (v2) 2021-06-04 16:03:06 -04:00